libxcoder  3.5.1
ni_nvme_logan.h
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3  * Copyright (C) 2022 NETINT Technologies
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5  * Permission is hereby granted, free of charge, to any person obtaining a copy
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18  * SOFTWARE.
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21 
22 /*!*****************************************************************************
23 * \file ni_nvme_logan.h
24 *
25 * \brief Definitions related to working with NI T-408 over NVME interface
26 *
27 *******************************************************************************/
28 
29 #pragma once
30 
31 #include "ni_defs_logan.h"
32 
33 #if !defined __ANDROID__ && !defined _MSC_VER
34 #include "../build/xcoder_auto_headers.h"
35 #endif
36 
37 #ifdef __cplusplus
38 extern "C"
39 {
40 #endif
41 
42 #define NI_LOGAN_NVME_IDENTITY_CMD_DATA_SZ 4096
43 
45 {
46  uint16_t ui16MaxPower;
47  uint8_t ui8Rsvd2;
48  uint8_t ui8Flags;
49  uint32_t ui32EntryLat;
50  uint32_t ui32ExitLat;
51  uint8_t ui8ReadTput;
52  uint8_t ui8ReadLat;
53  uint8_t ui8WriteTput;
54  uint8_t ui8WriteLat;
55  uint16_t ui16IdlePower;
56  uint8_t ui8IdleScale;
57  uint8_t ui8Rsvd19;
58  uint16_t ui16ActivePower;
60  uint8_t aui8Rsvd23[9];
62 
64 {
65  // NVMe identify controller data structure, p_first 3K bytes of general
66  // controller capabilities and features, copied from f/w nvme.h
67  uint16_t ui16Vid; //PCI Vendor ID
68  uint16_t ui16Ssvid; //PCI Subsystem Vendor ID
69  uint8_t ai8Sn[20]; //serial Number, it is a space right filled ASCII array(not a string)
70  uint8_t ai8Mn[40]; //Model number, it is a space right filled ASCII array(not a string)
71  uint8_t ai8Fr[8]; //Firmware Revision, it is a space right filled ASCII array(not a string)
72  uint8_t ui8Rab; //Recommend Arbitration Burst
73  uint8_t aui8Ieee[3]; //IEEE OUI Identifier
74  uint8_t ui8Cmic; //controller multi-path I/O and namespace sharing Capabilities
75  uint8_t ui8Mdts; //Maximum data transfer size
76  uint16_t ui16Cntlid; //Controller ID Savio: should be 2 bytes
77  uint32_t ui32Ver; //Version
78  uint32_t ui32Rtd3r; //RTD3 resume latency
79  uint32_t ui32Rtd3e; //RTD3 entry Latency
80  uint32_t ui32Oaes; //optional Asynchronous events supported
81  uint8_t aui8Rsvd96[160];
82  uint16_t ui16Oacs; //optional Admin Command Support
83  uint8_t ui8Acl; //Abort command Limit - 0's based value
84  uint8_t ui8Aerl; //Asynchronous Event Request Limit - 0's based value
85  uint8_t ui8Frmw; //Firmware updates
86  uint8_t ui8Lpa; //Log Page Attributes
87  uint8_t ui8Elpe; //Error Log Page Entries - 0's based value
88  uint8_t ui8Npss; //number of Power states support - 0's based value
89  uint8_t ui8Avscc; //Admin Vendor Specific Command Configuration
90  uint8_t ui8Apsta; //Autonomous power state transition attributes
91  uint16_t ui16Wctemp; //Warning Composite Temperature Threshold
92  uint16_t ui16Cctemp; //Critical Composite Temperature Threshold
93  uint16_t ui16Mtfa; //Maximum Time for Firmware Activation
94  uint32_t ui32Hmpre; //Host Memory Buffer Preferred Size
95  uint32_t ui32Hmmin; //Host Memory Buffer Minimum Size
96  uint8_t aui32Tnvmcap[16]; //Total NVM Capacity
97  uint8_t aui8Unvmcap[16]; //unallocated NVM Capacity
98  uint32_t ui32Rpmbs; //Replay Protected Memory Block Support
99  uint8_t aui8Rsvd316[196];
100  uint8_t ui8Sqes; //Submission Queue Entry Size
101  uint8_t ui8Cqes; //Completion Queue Entry Size
102  uint8_t ui8Rsvd514[2];
103  uint32_t ui32Nn; //Number of Namespaces
104  uint16_t ui16Oncs; //Optional NVM Command Support
105  uint16_t ui16Fuses; //Fused Operation Support
106  uint8_t ui8Fna; //Format NVM Attributes
107  uint8_t ui8Vwc; //Volatile write cache
108  uint16_t ui16Awun; //Atomic Write Unit Normal - 0's based value
109  uint16_t ui16Awupf; //Atomic Write Unit Power Fail - 0's based value
110  uint8_t ui8Nvscc; //NVM Vendor Specific Command Configuration
111  uint8_t ui8Rsvd531;
112  uint16_t ui16Acwu; //Atomic Compare & write Unit - 0's based value
113  uint8_t aui8Rsvd534[2];
114  uint32_t ui32Sgls; //SGL Support
115  uint8_t aui8Rsvd540[1508];
116  ni_logan_nvme_id_power_state_t asPsd[32]; //Power state Descriptors
117 
118  // Below are vendor-specific parameters
119  uint8_t aui8TotalRawCap[8]; // total raw capacity in the number of 4K
120  uint8_t ui8CurPcieLnkSpd; // current PCIe link speed
121  uint8_t ui8NegPcieLnkWid; // negotiated PCIe link width
122  uint16_t ui16ChipVer; // chip version in binary
123  uint8_t aui8FwLoaderRev[8]; // firmware loader revision in ASCII
124  uint8_t ui8NbFlashChan; // number of flash channels (1-32)
125  uint8_t ui8RAIDsupport; // RAID support. 1: supported 0: not
126 
127  // Below is xcoder part
128 
130  uint8_t sed_support;
131 
132  uint8_t xcoder_num_hw;
137  uint8_t xcoder_reserved[11];
138 
139  uint8_t hw0_id;
143  uint8_t hw0_codec_type;
150  uint8_t hw0_reserved[9];
151 
152  uint8_t hw1_id;
156  uint8_t hw1_codec_type;
163  uint8_t hw1_reserved[9];
164 
165  uint8_t hw2_id;
169  uint8_t hw2_codec_type;
176  uint8_t hw2_reserved[9];
177 
178  uint8_t hw3_id;
182  uint8_t hw3_codec_type;
189  uint8_t hw3_reserved[9];
190 
191  uint8_t fw_commit_hash[41];
192  uint8_t fw_commit_time[26];
193  uint8_t fw_branch_name[256];
196 
197 #ifdef __linux__
198 typedef struct _ni_logan_nvme_user_io
199 {
200  __u8 opcode;
201  __u8 flags;
202  __u16 control;
203  __u16 nblocks;
204  __u16 rsvd;
205  __u64 metadata;
206  __u64 addr;
207  __u64 slba;
208  __u32 dsmgmt;
209  __u32 reftag;
210  __u16 apptag;
211  __u16 appmask;
212 }ni_logan_nvme_user_io_t;
213 
214 typedef struct _ni_logan_nvme_passthrough_cmd
215 {
216  __u8 opcode;
217  __u8 flags;
218  __u16 rsvd1;
219  __u32 nsid;
220  __u32 cdw2;
221  __u32 cdw3;
222  __u64 metadata;
223  __u64 addr;
224  __u32 metadata_len;
225  __u32 data_len;
226  __u32 cdw10;
227  __u32 cdw11;
228  __u32 cdw12;
229  __u32 cdw13;
230  __u32 cdw14;
231  __u32 cdw15;
232  __u32 timeout_ms;
233  __u32 result; //DW0
234 }ni_logan_nvme_passthrough_cmd_t;
235 
236 typedef ni_logan_nvme_passthrough_cmd_t ni_logan_nvme_admin_cmd_t;
237 
238 #define NVME_IOCTL_ID _IO('N', 0x40)
239 #define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, ni_logan_nvme_admin_cmd_t)
240 #define NVME_IOCTL_SUBMIT_IO _IOW('N', 0x42, ni_logan_nvme_user_io_t)
241 #define NVME_IOCTL_IO_CMD _IOWR('N', 0x43, ni_logan_nvme_passthrough_cmd_t)
242 #define NVME_IOCTL_RESET _IO('N', 0x44)
243 #define NVME_IOCTL_SUBSYS_RESET _IO('N', 0x45)
244 #define NVME_IOCTL_RESCAN _IO('N', 0x46)
245 
246 #endif //defined(__linux__) defined
247 
248 #ifdef _WIN32
249 typedef struct _ni_logan_nvme_completion_result
250 {
251  uint32_t ui32Result;
252  uint32_t ui32Rsvd;
253  uint16_t ui16SqHead;
254  uint16_t ui16SqId;
255  uint16_t ui16CommandId;
256  uint16_t ui16Status;
257 }ni_logan_nvme_completion_result_t, *p_ni_logan_nvme_completion_result_t;
258 #endif
259 
260 #define NI_LOGAN_NO_CHECK_TS_NVME_CMD_OP (-1)
261 
263 {
290 
291 
293 {
296 
298 {
301 
303 {
306 
308 {
311 
313 {
318 
320 {
323 
325 {
336 
338 {
341 
343 {
347 
349 {
355 
357 {
367 
368 
370 {
371  uint32_t available_space : 24;
372  uint32_t frame_index : 4;
373  uint32_t reserved : 4;
375 
376 
377 typedef uint32_t ni_logan_nvme_result_t;
378 
379 
380 #if (PLATFORM_ENDIANESS == NI_BIG_ENDIAN_PLATFORM)
381 static inline uint64_t ni_logan_htonll(uint64_t val)
382 {
383  if (1 == htonl(1))
384  {
385  return val;
386  }
387 
388  return ((((uint64_t)htonl((val)&0xFFFFFFFFUL)) << 32) | htonl((uint32_t)((val) >> 32)));
389 }
390 
391 static inline uint64_t ni_logan_ntohll(uint64_t val)
392 {
393  if (1 == ntohl(1))
394  {
395  return val;
396  }
397 
398  return ((((uint64_t)ntohl((val)&0xFFFFFFFFUL)) << 32) | ntohl((uint32_t)((val) >> 32)));
399 }
400 
401 static inline uint32_t ni_logan_htonl(uint32_t val)
402 {
403  return htonl(val);
404 }
405 static inline uint16_t ni_logan_htons(uint16_t val)
406 {
407  return htons(val);
408 }
409 static inline uint32_t ni_logan_ntohl(uint32_t val)
410 {
411  return ntohl(val);
412 }
413 static inline uint16_t ni_logan_ntohs(uint16_t val)
414 {
415  return ntohs(val);
416 }
417 #else
418 static inline uint64_t ni_logan_ntohll(uint64_t val)
419 {
420  return (val);
421 }
422 static inline uint64_t ni_logan_htonll(uint64_t val)
423 {
424  return (val);
425 }
426 static inline uint32_t ni_logan_htonl(uint32_t val)
427 {
428  return (val);
429 }
430 static inline uint16_t ni_logan_htons(uint16_t val)
431 {
432  return (val);
433 }
434 static inline uint32_t ni_logan_ntohl(uint32_t val)
435 {
436  return (val);
437 }
438 static inline uint16_t ni_logan_ntohs(uint16_t val)
439 {
440  return (val);
441 }
442 #endif
443 
444 #define WRITE_INSTANCE_SET_DW2_SUBFRAME_IDX(dst, size) (dst = (size & 0xFFFFFFFFUL))
445 #define WRITE_INSTANCE_SET_DW3_SUBFRAME_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
446 
447 #define CREATE_SESSION_SET_DW10_SUBTYPE(dst) (dst = (nvme_open_xcoder_create_session & 0xFFFFUL))
448 #define CREATE_SESSION_SET_DW11_INSTANCE(dst, instance) (dst = (instance & 0xFFFFUL))
449 #define CREATE_SESSION_SET_DW12_DEC_CID(dst, cid) (dst = (cid & 0xFFFFUL))
450 
451 #define CREATE_SESSION_SET_DW12_ENC_CID_FRWIDTH(dst, cid, width) (dst = (((width << 16) & 0xFFFF0000UL) | (cid & 0xFFFFUL)))
452 #define CREATE_SESSION_SET_DW13_ENC_FRHIGHT(dst, hight) (dst = (hight & 0xFFFFUL))
453 #define CREATE_SESSION_SET_DW14_MODEL_LOAD(dst, load) (dst = (load & 0xFFFFFFFFUL))
454 #define CREATE_SESSION_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
455 
456 #define DESTROY_SESSION_SET_DW10_INSTANCE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_close_xcoder_destroy_session & 0xFFFFUL)))
457 
458 #define READ_INSTANCE_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_write_xcoder_write_instance & 0xFFFFUL)))
459 #define READ_INSTANCE_SET_DW11_INSTANCE(dst, instance) (dst = (instance & 0xFFFFUL))
460 #define READ_INSTANCE_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
461 
462 #define WRITE_INSTANCE_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_write_xcoder_write_instance & 0xFFFFUL)))
463 #define WRITE_INSTANCE_SET_DW11_INSTANCE(dst, instance) (dst = (instance & 0xFFFFUL))
464 #define WRITE_INSTANCE_SET_DW11_PAGEOFFSET(dst, pageoffset) (dst = (((pageoffset << 16) | dst)))
465 #define WRITE_INSTANCE_SET_DW12_ISHWDESC(dst, ishwdesc) (dst = (ishwdesc & 0xFFFFUL))
466 #define WRITE_INSTANCE_SET_DW12_FRAMEINSTID(dst, fid) (dst = (0xFFFFUL & dst) | ((fid<<16) & 0xFFFF0000UL))
467 #define WRITE_INSTANCE_SET_DW14_YUV_BYTEOFFSET(dst, byteoffset) (dst = (byteoffset & 0xFFFFFFFFUL))
468 #define WRITE_INSTANCE_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
469 
470 #define QUERY_SESSION_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_query_xcoder_query_session & 0xFFFFUL)))
471 #define QUERY_SESSION_SET_DW11_INSTANCE(dst, instance) (dst = (instance & 0xFFFFUL))
472 #define QUERY_SESSION_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
473 
474 #define QUERY_INSTANCE_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_query_xcoder_query_instance & 0xFFFFUL)))
475 #define QUERY_INSTANCE_SET_DW11_INSTANCE_STATUS(dst, instance) (dst = (((nvme_query_xcoder_instance_get_status << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
476 #define QUERY_INSTANCE_SET_DW11_INSTANCE_STREAM_INFO(dst, instance) (dst = (((nvme_query_xcoder_instance_get_stream_info << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
477 #define QUERY_INSTANCE_SET_DW11_INSTANCE_END_OF_OUTPUT(dst, instance) (dst = (((nvme_query_xcoder_instance_get_end_of_output << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
478 
479 #define QUERY_INSTANCE_SET_DW11_INSTANCE_BUF_INFO(dst, rw_type, inst_type) (dst = (((rw_type << 16) & 0xFFFF0000UL) | (inst_type & 0xFFFFUL)))
480 
481 #define QUERY_INSTANCE_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
482 
483 #define QUERY_GENERAL_SET_DW10_SUBTYPE(dst) (dst = ( (nvme_query_xcoder_query_general & 0xFFFFUL)))
484 #define QUERY_GENERAL_SET_DW11_INSTANCE_STATUS(dst, instance) (dst = (((nvme_query_xcoder_general_get_status << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
485 #define CONFIG_SESSION_SET_DW10_SESSION_ID(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_config_xcoder_config_session & 0xFFFFUL)))
486 #define CONFIG_SESSION_SET_DW11_SUBTYPE(dst, subtype) (dst = (((0 << 16) & 0xFFFF0000UL) | (subtype & 0xFFFFUL)))
487 #define CONFIG_SESSION_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
488 
489 
490 #define CONFIG_INSTANCE_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_config_xcoder_config_instance & 0xFFFFUL)))
491 #define CONFIG_INSTANCE_SET_DW11_SOS(dst, instance) (dst = (((nvme_config_xcoder_config_set_sos << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
492 #define CONFIG_INSTANCE_SET_DW11_EOS(dst, instance) (dst = (((nvme_config_xcoder_config_set_eos << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
493 #define CONFIG_INSTANCE_SET_DW11_ENC_PARAMS(dst, instance) (dst = (((nvme_config_xcoder_config_set_enc_params << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
494 #define CONFIG_INSTANCE_SET_DW11_ENC_FRAME_PARAMS(dst, instance) (dst = (((nvme_config_xcoder_config_set_enc_frame_params << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
495 #define CONFIG_INSTANCE_SET_DW11_FLUSH(dst, instance) (dst = (((nvme_config_xcoder_config_flush << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
496 #define CONFIG_INSTANCE_SET_DW11_UPDATE_PARAMS(dst, instance) (dst = (((nvme_config_xcoder_config_update_enc_params << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
497 #define CONFIG_INSTANCE_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
498 
499 
500 /*!******************************************************************************
501  * \brief Check f/w error return code, and if it's a fatal one return NI_LOGAN_RETCODE_FAILURE.
502  * Application shall handle this gracefully.
503  *
504  * \param
505  *
506  * \return 1 (or non-zero) if need to terminate, 0 otherwise
507  ******************************************************************************/
510  uint32_t xcoder_type,
511  uint32_t hw_id,
512  int32_t* inst_id);
513 
514 /*!******************************************************************************
515  * \brief prints a report on detected nvme devices
516  *
517  * \param
518  *
519  * \return
520  *******************************************************************************/
521 int ni_logan_nvme_enumerate_devices(char ni_logan_devices[][NI_LOGAN_MAX_DEVICE_NAME_LEN], int max_handles);
522 
523 
524 #ifdef __linux__
525 /*!******************************************************************************
526  * \brief Submit a nvme admin passthrough command to the driver
527  *
528  * \param
529  *
530  * \return
531  *******************************************************************************/
532 int32_t ni_logan_nvme_send_admin_pass_through_command(ni_device_handle_t fd, ni_logan_nvme_passthrough_cmd_t* cmd);
533 
534 /*!******************************************************************************
535  * \brief Submit a nvme io passthrough command to the driver
536  *
537  * \param
538  *
539  * \return
540  *******************************************************************************/
541 int32_t ni_logan_nvme_send_io_pass_through_command(ni_device_handle_t fd, ni_logan_nvme_passthrough_cmd_t* cmd);
542 #endif
543 
544 
545 /********************* transcoder through io read/write command ***********************/
546 #define NI_LOGAN_DATA_BUFFER_LEN 4096
547 #define LBA_BIT_OFFSET 12 //logic block size = 4K
548 
549 //supposed LBA 4K aligned
550 #define NI_LOGAN_SUB_BIT_OFFSET 4
551 #define NI_LOGAN_OP_BIT_OFFSET 8
552 #define NI_LOGAN_INSTANCE_TYPE_OFFSET 18
553 #define NI_LOGAN_SESSION_ID_OFFSET 19
554 #define NI_LOGAN_HW_DESC_OFFSET 26
555 
556 #define MBs(xMB) ((xMB)*1024*1024)
557 #define MBs_to_4k(xMB) ((xMB)*1024*1024/4096) // MB to 4K
558 
559 #define START_OFFSET_IN_4K MBs_to_4k(512) // 0x00 -- 0x20000
560 
561 #define CTL_OFFSET_IN_4K(op,sub,subtype) (START_OFFSET_IN_4K+(((op)<<NI_LOGAN_OP_BIT_OFFSET) + \
562  ((sub)<<NI_LOGAN_SUB_BIT_OFFSET)+subtype)) // 0x20000 -- 0x28000, each (op,sub,subtype) has 4k bytes
563 #define RD_OFFSET_IN_4K (START_OFFSET_IN_4K + MBs_to_4k(128)) // 0x28000 -- 0x30000
564 #define WR_OFFSET_IN_4K (RD_OFFSET_IN_4K + MBs_to_4k(128)) // 0x30000 -- 0x38000
565 #define HIGH_OFFSET_IN_4K(hw,sid,instance) (((hw<<(NI_LOGAN_HW_DESC_OFFSET-NI_LOGAN_INSTANCE_TYPE_OFFSET))|((sid & 0x7FUL)<<1)|(instance))<<NI_LOGAN_INSTANCE_TYPE_OFFSET) // 1024MB
566 #define GAP(opcode) ((opcode) - nvme_admin_cmd_xcoder_open)
567 #define WR_METADATA_OFFSET_IN_4K (WR_OFFSET_IN_4K + MBs_to_4k(128) + MBs_to_4k(11)) // 0x38B00 -- 0x39300 8M
568 
569 /************read/write command macro*******************/
570 //write instance
571 #define WRITE_INSTANCE_W(hw,sid,instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + WR_OFFSET_IN_4K
572 
573 // write separate metadata
574 #define WRITE_METADATA_W(hw,sid, instance) HIGH_OFFSET_IN_4K(hw,sid, instance) + WR_METADATA_OFFSET_IN_4K
575 
576 //read instance
577 #define READ_INSTANCE_R(hw,sid,instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + RD_OFFSET_IN_4K
578 
579 /************control command macro**********************/
580 //identify
581 #define IDENTIFY_DEVICE_R HIGH_OFFSET_IN_4K(0,0,0) + CTL_OFFSET_IN_4K(GAP(0xD7), 1, 0)
582 
583 //open
584 #define OPEN_GET_SID_R(hw, instance) HIGH_OFFSET_IN_4K(hw,0,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_open), \
585  nvme_open_xcoder_create_session,2)
586 #define OPEN_SESSION_W(hw, sid,instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_open), \
587  nvme_open_xcoder_create_session,0)
588 
589 //close
590 #define CLOSE_SESSION_R(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_close), \
591  nvme_close_xcoder_destroy_session,0)
592 
593 //query
594 #define QUERY_SESSION_R(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
595  nvme_query_xcoder_query_session,0)
596 #define QUERY_INSTANCE_STATUS_R(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
597  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_get_status)
598 #define QUERY_INSTANCE_CUR_STATUS_INFO_R(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
599  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_get_current_status)
600 #define QUERY_INSTANCE_STREAM_INFO_R(hw, sid,instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
601  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_get_stream_info)
602 #define QUERY_INSTANCE_RBUFF_SIZE_R(hw, sid, instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
603  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_read_buf_size)
604 #define QUERY_INSTANCE_WBUFF_SIZE_R(hw, sid, instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
605  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_write_buf_size)
606 #define QUERY_INSTANCE_UPLOAD_ID_R(hw, sid, instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
607  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_upload_idx)
608 #define QUERY_INSTANCE_ACQUIRE_BUF(hw, sid, instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
609  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_acquire_buf)
610 #define QUERY_GENERAL_GET_STATUS_R(instance) HIGH_OFFSET_IN_4K(0,0,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
611  nvme_query_xcoder_query_general,nvme_query_xcoder_general_get_status)
612 #define QUERY_INSTANCE_DEBUG_INFO_R(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
613  nvme_query_xcoder_query_instance,nvme_query_xcoder_config_get_sub_inst_debug_info)
614 #define QUERY_INSTANCE_DEBUG_DATA_R(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
615  nvme_query_xcoder_query_instance,nvme_query_xcoder_config_get_sub_inst_debug_data)
616 
617 
618 //config instance
619 #define CONFIG_INSTANCE_SetSOS_W(hw,sid,instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
620  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_sos)
621 #define CONFIG_INSTANCE_SetEOS_W(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
622  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_eos)
623 #define CONFIG_INSTANCE_SetFlush_W(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
624  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_flush)
625 #define CONFIG_INSTANCE_SetEncPara_W(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
626  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_enc_params)
627 #define CONFIG_INSTANCE_UpdateEncPara_W(sid,instance) HIGH_OFFSET_IN_4K(0,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
628  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_update_enc_params)
629 #define CONFIG_INSTANCE_SetPktSize_W(hw,sid,instance) HIGH_OFFSET_IN_4K(hw,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
630  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_dec_packet_size)
631 #define CONFIG_INSTANCE_InitFramePool_W(sid,instance) HIGH_OFFSET_IN_4K(1,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
632  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_init_buf_params)
633 #define CONFIG_INSTANCE_RecycleBuf_W(sid,instance) HIGH_OFFSET_IN_4K(1,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
634  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_recycle_buf_params)
635 #define CONFIG_INSTANCE_FrameIdx_W(sid,instance) HIGH_OFFSET_IN_4K(1,sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
636  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_read_frame_idx)
637 
638 //config session
639 #define CONFIG_SESSION_KeepAlive_W(sid) HIGH_OFFSET_IN_4K(0,sid,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
640  nvme_config_xcoder_config_session,nvme_config_xcoder_config_session_keep_alive)
641 
642 #define CONFIG_SESSION_KeepAliveTimeout_W(sid) HIGH_OFFSET_IN_4K(0,sid,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
643  nvme_config_xcoder_config_session,nvme_config_xcoder_config_session_keep_alive_timeout)
644 
645 #define CONFIG_SESSION_Read_W(sid) HIGH_OFFSET_IN_4K(0,sid,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
646  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_session_read)
647 
648 #define CONFIG_SESSION_Write_W(sid) HIGH_OFFSET_IN_4K(0,sid,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
649  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_session_write)
650 
651 int32_t ni_logan_nvme_send_read_cmd(ni_device_handle_t handle,
652  ni_event_handle_t event_handle,
653  void *p_data,
654  uint32_t data_len,
655  uint32_t lba);
656 
657 int32_t ni_logan_nvme_send_write_cmd(ni_device_handle_t handle,
658  ni_event_handle_t event_handle,
659  void *p_data,
660  uint32_t data_len,
661  uint32_t lba);
662 
663 #ifdef __cplusplus
664 }
665 #endif
Common NETINT definitions used by all modules.
ni_logan_retcode_t
#define NI_LOGAN_MAX_DEVICE_NAME_LEN
enum _nvme_query_xcoder_subtype nvme_query_xcoder_subtype_t
enum _nvme_query_xcoder_general_subtype nvme_query_xcoder_general_subtype_t
_nvme_query_xcoder_subtype
@ nvme_query_xcoder_query_session
@ nvme_query_xcoder_query_instance
@ nvme_query_xcoder_query_general
int ni_logan_nvme_enumerate_devices(char ni_logan_devices[][NI_LOGAN_MAX_DEVICE_NAME_LEN], int max_handles)
prints a report on detected nvme devices
enum _nvme_close_xcoder_subtype nvme_close_xcoder_subtype_t
_ni_logan_nvme_admin_opcode
@ nvme_admin_cmd_create_cq
@ nvme_admin_cmd_identify
@ nvme_admin_cmd_async_event
@ nvme_admin_cmd_set_features
@ nvme_admin_cmd_xcoder_config
@ nvme_admin_cmd_ns_attach
@ nvme_admin_cmd_abort_cmd
@ nvme_admin_cmd_xcoder_open
@ nvme_admin_cmd_xcoder_query
@ nvme_admin_cmd_xcoder_read
@ nvme_admin_cmd_xcoder_identity
@ nvme_admin_cmd_delete_cq
@ nvme_admin_cmd_activate_fw
@ nvme_admin_cmd_xcoder_close
@ nvme_admin_cmd_format_nvm
@ nvme_admin_cmd_delete_sq
@ nvme_admin_cmd_download_fw
@ nvme_admin_cmd_xcoder_write
@ nvme_admin_cmd_get_log_page
@ nvme_admin_cmd_create_sq
@ nvme_admin_cmd_security_send
@ nvme_admin_cmd_get_features
@ nvme_admin_cmd_ns_mgmt
@ nvme_admin_cmd_xcoder_connect
@ nvme_admin_cmd_security_recv
_nvme_write_xcoder_subtype
@ nvme_write_xcoder_write_instance
ni_logan_retcode_t ni_logan_nvme_check_error_code(int rc, ni_logan_nvme_admin_opcode_t opcode, uint32_t xcoder_type, uint32_t hw_id, int32_t *inst_id)
Check f/w error return code, and if it's a fatal one return NI_LOGAN_RETCODE_FAILURE....
Definition: ni_nvme_logan.c:55
_nvme_config_xcoder_config_session_subtype
@ nvme_config_xcoder_config_session_read
@ nvme_config_xcoder_config_session_keep_alive
@ nvme_config_xcoder_config_session_write
@ nvme_config_xcoder_config_session_keep_alive_timeout
_nvme_query_xcoder_instance_subtype
@ nvme_query_xcoder_instance_get_status
@ nvme_query_xcoder_instance_write_buf_size
@ nvme_query_xcoder_instance_read_buf_size
@ nvme_query_xcoder_instance_get_stream_info
@ nvme_query_xcoder_instance_upload_idx
@ nvme_query_xcoder_instance_get_current_status
@ nvme_query_xcoder_config_get_sub_inst_debug_info
@ nvme_query_xcoder_config_get_sub_inst_debug_data
@ nvme_query_xcoder_instance_acquire_buf
_nvme_query_xcoder_general_subtype
@ nvme_query_xcoder_general_get_status
_nvme_query_xcoder_session_subtype
@ nvme_query_xcoder_session
enum _nvme_query_xcoder_instance_subtype nvme_query_xcoder_instance_subtype_t
enum _ni_logan_nvme_admin_opcode ni_logan_nvme_admin_opcode_t
enum _nvme_config_xcoder_config_session_subtype nvme_config_xcoder_config_session_subtype_t
int32_t ni_logan_nvme_send_write_cmd(ni_device_handle_t handle, ni_event_handle_t event_handle, void *p_data, uint32_t data_len, uint32_t lba)
Compose a io write command.
_nvme_open_xcoder_subtype
@ nvme_open_xcoder_create_session
_nvme_config_xcoder_subtype
@ nvme_config_xcoder_config_session
@ nvme_config_xcoder_config_instance
struct _ni_logan_nvme_write_complete_dw0_t ni_logan_nvme_write_complete_dw0_t
enum _nvme_write_xcoder_subtype nvme_write_xcoder_subtype_t
enum _nvme_query_xcoder_session_subtype nvme_query_xcoder_session_subtype_t
struct _ni_logan_nvme_id_power_state ni_logan_nvme_id_power_state_t
_nvme_config_xcoder_config_instance_subtype
@ nvme_config_xcoder_config_set_flush
@ nvme_config_xcoder_config_set_enc_params
@ nvme_config_xcoder_config_init_buf_params
@ nvme_config_xcoder_config_set_sos
@ nvme_config_xcoder_config_set_eos
@ nvme_config_xcoder_config_set_dec_packet_size
@ nvme_config_xcoder_config_read_frame_idx
@ nvme_config_xcoder_config_recycle_buf_params
int32_t ni_logan_nvme_send_read_cmd(ni_device_handle_t handle, ni_event_handle_t event_handle, void *p_data, uint32_t data_len, uint32_t lba)
Compose a io read command.
enum _nvme_read_xcoder_subtype nvme_read_xcoder_subtype_t
enum _nvme_config_xcoder_subtype nvme_config_xcoder_subtype_t
struct _ni_logan_nvme_identity ni_logan_nvme_identity_t
enum _nvme_config_xcoder_config_instance_subtype nvme_config_xcoder_config_instance_subtype_t
_nvme_close_xcoder_subtype
@ nvme_close_xcoder_destroy_session
_nvme_read_xcoder_subtype
@ nvme_read_xcoder_read_instance
uint32_t ni_logan_nvme_result_t
enum _nvme_open_xcoder_subtype nvme_open_xcoder_subtype_t
uint8_t aui8Rsvd540[1508]
uint8_t aui8Rsvd316[196]
Definition: ni_nvme_logan.h:99
uint8_t fw_repo_info_padding[9]
uint8_t fw_branch_name[256]
ni_logan_nvme_id_power_state_t asPsd[32]