libxcoder  5.2.0
ni_nvme.h
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21 
22 /*!*****************************************************************************
23  * \file ni_nvme.h
24  *
25  * \brief Private definitions for interfacing with NETINT video processing
26  * devices over NVMe
27  ******************************************************************************/
28 
29 #pragma once
30 
31 #include "ni_defs.h"
32 
33 #ifdef __cplusplus
34 extern "C"
35 {
36 #endif
37 
38 #define NI_NVME_IDENTITY_CMD_DATA_SZ 4096
39 
40 typedef struct _ni_nvme_command
41 {
42  uint32_t cdw2;
43  uint32_t cdw3;
44  uint32_t cdw10;
45  uint32_t cdw11;
46  uint32_t cdw12;
47  uint32_t cdw13;
48  uint32_t cdw14;
49  uint32_t cdw15;
51 
53 {
54  uint16_t ui16MaxPower;
55  uint8_t ui8Rsvd2;
56  uint8_t ui8Flags;
57  uint32_t ui32EntryLat;
58  uint32_t ui32ExitLat;
59  uint8_t ui8ReadTput;
60  uint8_t ui8ReadLat;
61  uint8_t ui8WriteTput;
62  uint8_t ui8WriteLat;
63  uint16_t ui16IdlePower;
64  uint8_t ui8IdleScale;
65  uint8_t ui8Rsvd19;
66  uint16_t ui16ActivePower;
68  uint8_t aui8Rsvd23[9];
70 
71 #pragma pack(1)
73 {
74  uint8_t hw_id;
76  uint8_t hw_max_4k_fps;
77  uint8_t hw_codec_format;
78  uint8_t hw_codec_type;
84  uint8_t hw_video_level;
85  uint8_t hw_reserved[9];
87 #pragma pack()
88 
89 typedef struct _ni_nvme_identity
90 {
91  // NVMe identify controller data structure, p_first 3K bytes of general
92  // controller capabilities and features, copied from f/w nvme.h
93  uint16_t ui16Vid; //PCI Vendor ID
94  uint16_t ui16Ssvid; //PCI Subsystem Vendor ID
95  uint8_t ai8Sn[20]; //serial Number, it is a space right filled ASCII array(not a string)
96  uint8_t ai8Mn[40]; //Model number, it is a space right filled ASCII array(not a string)
97  uint8_t ai8Fr[8]; //Firmware Revision, it is a space right filled ASCII array(not a string)
98  uint8_t ui8Rab; //Recommend Arbitration Burst
99  uint8_t aui8Ieee[3]; //IEEE OUI Identifier
100  uint8_t ui8Cmic; //controller multi-path I/O and namespace sharing Capabilities
101  uint8_t ui8Mdts; //Maximum data transfer size
102  uint16_t ui16Cntlid; //Controller ID Savio: should be 2 bytes
103  uint32_t ui32Ver; //Version
104  uint32_t ui32Rtd3r; //RTD3 resume latency
105  uint32_t ui32Rtd3e; //RTD3 entry Latency
106  uint32_t ui32Oaes; //optional Asynchronous events supported
107  uint8_t aui8Rsvd96[160];
108  uint16_t ui16Oacs; //optional Admin Command Support
109  uint8_t ui8Acl; //Abort command Limit - 0's based value
110  uint8_t ui8Aerl; //Asynchronous Event Request Limit - 0's based value
111  uint8_t ui8Frmw; //Firmware updates
112  uint8_t ui8Lpa; //Log Page Attributes
113  uint8_t ui8Elpe; //Error Log Page Entries - 0's based value
114  uint8_t ui8Npss; //number of Power states support - 0's based value
115  uint8_t ui8Avscc; //Admin Vendor Specific Command Configuration
116  uint8_t ui8Apsta; //Autonomous power state transition attributes
117  uint16_t ui16Wctemp; //Warning Composite Temperature Threshold
118  uint16_t ui16Cctemp; //Critical Composite Temperature Threshold
119  uint16_t ui16Mtfa; //Maximum Time for Firmware Activation
120  uint32_t ui32Hmpre; //Host Memory Buffer Preferred Size
121  uint32_t ui32Hmmin; //Host Memory Buffer Minimum Size
122  uint8_t aui32Tnvmcap[16]; //Total NVM Capacity
123  uint8_t aui8Unvmcap[16]; //unallocated NVM Capacity
124  uint32_t ui32Rpmbs; //Replay Protected Memory Block Support
125  uint8_t aui8Rsvd316[196];
126  uint8_t ui8Sqes; //Submission Queue Entry Size
127  uint8_t ui8Cqes; //Completion Queue Entry Size
128  uint8_t ui8Rsvd514[2];
129  uint32_t ui32Nn; //Number of Namespaces
130  uint16_t ui16Oncs; //Optional NVM Command Support
131  uint16_t ui16Fuses; //Fused Operation Support
132  uint8_t ui8Fna; //Format NVM Attributes
133  uint8_t ui8Vwc; //Volatile write cache
134  uint16_t ui16Awun; //Atomic Write Unit Normal - 0's based value
135  uint16_t ui16Awupf; //Atomic Write Unit Power Fail - 0's based value
136  uint8_t ui8Nvscc; //NVM Vendor Specific Command Configuration
137  uint8_t ui8Rsvd531;
138  uint16_t ui16Acwu; //Atomic Compare & write Unit - 0's based value
139  uint8_t aui8Rsvd534[2];
140  uint32_t ui32Sgls; //SGL Support
141  uint8_t aui8Rsvd540[1508];
142  ni_nvme_id_power_state_t asPsd[32]; //Power state Descriptors
143 
144  // Below are vendor-specific parameters
145  uint8_t aui8TotalRawCap[8]; // total raw capacity in the number of 4K
146  uint8_t ui8CurPcieLnkSpd; // current PCIe link speed
147  uint8_t ui8NegPcieLnkWid; // negotiated PCIe link width
148  uint16_t ui16ChipVer; // chip version in binary
149  uint8_t aui8FwLoaderRev[8]; // firmware loader revision in ASCII
150  uint8_t ui8NbFlashChan; // number of flash channels (1-32)
151  uint8_t ui8RAIDsupport; // RAID support. 1: supported 0: not
152 
153  // Below is xcoder part
154 
156  uint8_t sed_support;
157 
158  // xcoder HW - version 1
159  uint8_t xcoder_num_hw;
164  uint8_t xcoder_reserved[11];
165 
166  uint8_t hw0_id;
170  uint8_t hw0_codec_type;
177  uint8_t hw0_reserved[9];
178 
179  uint8_t hw1_id;
183  uint8_t hw1_codec_type;
190  uint8_t hw1_reserved[9];
191 
192  uint8_t hw2_id;
196  uint8_t hw2_codec_type;
203  uint8_t hw2_reserved[9];
204 
205  uint8_t hw3_id;
209  uint8_t hw3_codec_type;
216  uint8_t hw3_reserved[9];
217 
218  uint8_t fw_branch_name[256];
219  uint8_t fw_commit_time[26];
220  uint8_t fw_commit_hash[41];
221  uint8_t fw_build_time[26];
222  uint8_t fw_build_id[256];
224 
225  uint8_t memory_cfg; // 0 == DR, 1 == SR, 2 == SR(disable P2P), 3 == SR_4G
226  // byte offset 469 (=468+1 due to alignment at hw0_max_video_width)
227 
228  // xcoder HW - version 2 (replaces/deprecates version 1)
229  uint8_t xcoder_num_elements; // total element types
230  uint8_t xcoder_num_devices; // total devices
231  uint8_t xcoder_cnt[14]; // device count per type
234 
235 #ifdef __linux__
236 
237 typedef struct _ni_nvme_user_io
238 {
239  __u8 opcode;
240  __u8 flags;
241  __u16 control;
242  __u16 nblocks;
243  __u16 rsvd;
244  __u64 metadata;
245  __u64 addr;
246  __u64 slba;
247  __u32 dsmgmt;
248  __u32 reftag;
249  __u16 apptag;
250  __u16 appmask;
251 } ni_nvme_user_io_t;
252 
253 typedef struct _ni_nvme_passthrough_cmd
254 {
255  __u8 opcode;
256  __u8 flags;
257  __u16 rsvd1;
258  __u32 nsid;
259  __u32 cdw2;
260  __u32 cdw3;
261  __u64 metadata;
262  __u64 addr;
263  __u32 metadata_len;
264  __u32 data_len;
265  __u32 cdw10;
266  __u32 cdw11;
267  __u32 cdw12;
268  __u32 cdw13;
269  __u32 cdw14;
270  __u32 cdw15;
271  __u32 timeout_ms;
272  __u32 result; //DW0
273 }ni_nvme_passthrough_cmd_t;
274 
275 typedef ni_nvme_passthrough_cmd_t ni_nvme_admin_cmd_t;
276 
277 #define NVME_IOCTL_ID _IO('N', 0x40)
278 #define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, ni_nvme_admin_cmd_t)
279 #define NVME_IOCTL_SUBMIT_IO _IOW('N', 0x42, ni_nvme_user_io_t)
280 #define NVME_IOCTL_IO_CMD _IOWR('N', 0x43, ni_nvme_passthrough_cmd_t)
281 #define NVME_IOCTL_RESET _IO('N', 0x44)
282 #define NVME_IOCTL_SUBSYS_RESET _IO('N', 0x45)
283 #define NVME_IOCTL_RESCAN _IO('N', 0x46)
284 
285 #endif //__linux__ defined
286 
287 #ifdef _WIN32
288 typedef struct _ni_nvme_completion_result
289 {
290  uint32_t ui32Result;
291  uint32_t ui32Rsvd;
292  uint16_t ui16SqHead;
293  uint16_t ui16SqId;
294  uint16_t ui16CommandId;
295  uint16_t ui16Status;
296 }ni_nvme_completion_result_t, *p_ni_nvme_completion_result_t;
297 #endif
298 
300 {
333 
335 {
339 
341 {
344 
346 {
349 
351 {
354 
356 {
361 
363 {
366 
368 {
385  0x000c, //config_set_write_length
387  nvme_query_xcoder_instance_scl_place_holder = 0x000d, //config_alloc_frame
391 
393 {
398 
400 {
405 
407 {
417 
419 {
435  nvme_config_xcoder_config_alloc_frame = 0x000d, // scaler only
437  nvme_config_xcoder_instance_read_buf_size_busy_place_holder = 0x000e, // admin type taken by busy query read
439  nvme_config_xcoder_instance_write_buf_size_busy_place_holder = 0x000f, // admin type taken by busy query write
441 
443 {
450 
452 {
453 
454  uint32_t available_space : 24;
455  uint32_t frame_index : 4;
456  uint32_t reserved : 4;
457 
459 
460 
461 typedef uint32_t ni_nvme_result_t;
462 
463 
464 #if (PLATFORM_ENDIANESS == NI_BIG_ENDIAN_PLATFORM)
465 static inline uint64_t ni_htonll(uint64_t val)
466 {
467  if (1 == htonl(1))
468  return val;
469 
470  return ((((uint64_t)htonl((val)&0xFFFFFFFFUL)) << 32) | htonl((uint32_t)((val) >> 32)));
471 }
472 
473 static inline uint64_t ni_ntohll(uint64_t val)
474 {
475  if (1 == ntohl(1))
476  return val;
477 
478  return ((((uint64_t)ntohl((val)&0xFFFFFFFFUL)) << 32) | ntohl((uint32_t)((val) >> 32)));
479 }
480 
481 static inline uint32_t ni_htonl(uint32_t val)
482 {
483  return htonl(val);
484 }
485 static inline uint16_t ni_htons(uint16_t val)
486 {
487  return htons(val);
488 }
489 static inline uint32_t ni_ntohl(uint32_t val)
490 {
491  return ntohl(val);
492 }
493 static inline uint16_t ni_ntohs(uint16_t val)
494 {
495  return ntohs(val);
496 }
497 #else
498 static inline uint64_t ni_ntohll(uint64_t val)
499 {
500  return (val);
501 }
502 static inline uint64_t ni_htonll(uint64_t val)
503 {
504  return (val);
505 }
506 static inline uint32_t ni_htonl(uint32_t val)
507 {
508  return (val);
509 }
510 static inline uint16_t ni_htons(uint16_t val)
511 {
512  return (val);
513 }
514 static inline uint32_t ni_ntohl(uint32_t val)
515 {
516  return (val);
517 }
518 static inline uint16_t ni_ntohs(uint16_t val)
519 {
520  return (val);
521 }
522 #endif
523 
524 #define WRITE_INSTANCE_SET_DW2_SUBFRAME_IDX(dst, size) (dst = (size & 0xFFFFFFFFUL))
525 #define WRITE_INSTANCE_SET_DW3_SUBFRAME_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
526 
527 #define CREATE_SESSION_SET_DW10_SUBTYPE(dst) (dst = (nvme_open_xcoder_create_session & 0xFFFFUL))
528 #define CREATE_SESSION_SET_DW11_INSTANCE(dst, instance) (dst = (instance & 0xFFFFUL))
529 #define CREATE_SESSION_SET_DW12_DEC_CID(dst, cid) (dst = (cid & 0xFFFFUL))
530 #define CREATE_SESSION_SET_DW12_DEC_HWF(dst, hwf) (dst = (((hwf << 16) & 0xFFFF0000UL) | (dst & 0xFFFFUL)))
531 
532 #define CREATE_SESSION_SET_DW12_SCL_OPC(dst, opc) (dst = (opc & 0xFFFFUL))
533 
534 #define CREATE_SESSION_SET_DW12_ENC_CID_FRWIDTH(dst, cid, width) (dst = (((width << 16) & 0xFFFF0000UL) | (cid & 0xFFFFUL)))
535 #define CREATE_SESSION_SET_DW13_ENC_FRHIGHT(dst, hight) (dst = (hight & 0xFFFFUL))
536 #define CREATE_SESSION_SET_DW14_MODEL_LOAD(dst, load) (dst = (load & 0xFFFFFFFFUL))
537 
538 #define CREATE_SESSION_SET_DW12_AI_HWF(dst, hwf) \
539  (dst = (((hwf << 16) & 0xFFFF0000UL) | (dst & 0xFFFFUL)))
540 
541 #define DESTROY_SESSION_SET_DW10_INSTANCE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_close_xcoder_destroy_session & 0xFFFFUL)))
542 
543 #define READ_INSTANCE_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_write_xcoder_write_instance & 0xFFFFUL)))
544 #define READ_INSTANCE_SET_DW11_INSTANCE(dst, instance) (dst = (instance & 0xFFFFUL))
545 #define READ_INSTANCE_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
546 
547 #define WRITE_INSTANCE_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_write_xcoder_write_instance & 0xFFFFUL)))
548 #define WRITE_INSTANCE_SET_DW11_INSTANCE(dst, instance) (dst = (instance & 0xFFFFUL))
549 #define WRITE_INSTANCE_SET_DW11_PAGEOFFSET(dst, pageoffset) (dst = (((pageoffset << 16) | dst)))
550 #define WRITE_INSTANCE_SET_DW12_ISHWDESC(dst, ishwdesc) (dst = (ishwdesc & 0xFFFFUL))
551 #define WRITE_INSTANCE_SET_DW12_FRAMEINSTID(dst, fid) (dst = (0xFFFFUL & dst) | ((fid<<16) & 0xFFFF0000UL))
552 
553 #define WRITE_INSTANCE_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
554 
555 #define QUERY_SESSION_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_query_xcoder_query_session & 0xFFFFUL)))
556 #define QUERY_SESSION_SET_DW11_INSTANCE(dst, instance) (dst = (instance & 0xFFFFUL))
557 #define QUERY_SESSION_SET_DW11_SESSION_STATS(dst) (dst = (nvme_query_xcoder_session_get_stats & 0xFFFFUL))
558 #define QUERY_SESSION_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
559 
560 #define QUERY_INSTANCE_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_query_xcoder_query_instance & 0xFFFFUL)))
561 #define QUERY_INSTANCE_SET_DW11_INSTANCE_STATUS(dst, instance) (dst = (((nvme_query_xcoder_instance_get_status << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
562 #define QUERY_INSTANCE_SET_DW11_INSTANCE_STREAM_INFO(dst, instance) (dst = (((nvme_query_xcoder_instance_get_stream_info << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
563 #define QUERY_INSTANCE_SET_DW11_INSTANCE_END_OF_OUTPUT(dst, instance) (dst = (((nvme_query_xcoder_instance_get_end_of_output << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
564 
565 #define QUERY_INSTANCE_SET_DW11_INSTANCE_BUF_INFO(dst, rw_type, inst_type) (dst = (((rw_type << 16) & 0xFFFF0000UL) | (inst_type & 0xFFFFUL)))
566 
567 #define QUERY_INSTANCE_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
568 
569 #define QUERY_GENERAL_SET_DW10_SUBTYPE(dst) (dst = ( (nvme_query_xcoder_query_general & 0xFFFFUL)))
570 #define QUERY_GENERAL_SET_DW11_INSTANCE_STATUS(dst, instance) (dst = (((nvme_query_xcoder_general_get_status << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
571 #define CONFIG_SESSION_SET_DW10_SESSION_ID(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_config_xcoder_config_session & 0xFFFFUL)))
572 #define CONFIG_SESSION_SET_DW11_SUBTYPE(dst, subtype) (dst = (((0 << 16) & 0xFFFF0000UL) | (subtype & 0xFFFFUL)))
573 #define CONFIG_SESSION_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
574 
575 #define CONFIG_INSTANCE_SET_DW10_SUBTYPE(dst, sid) (dst = (((sid << 16) & 0xFFFF0000UL) | (nvme_config_xcoder_config_instance & 0xFFFFUL)))
576 #define CONFIG_INSTANCE_SET_DW11_SOS(dst, instance) (dst = (((nvme_config_xcoder_config_set_sos << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
577 #define CONFIG_INSTANCE_SET_DW11_EOS(dst, instance) (dst = (((nvme_config_xcoder_config_set_eos << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
578 #define CONFIG_INSTANCE_SET_DW11_DEC_PARAMS(dst, instance) (dst = (((nvme_config_xcoder_config_set_dec_params << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
579 #define CONFIG_INSTANCE_SET_DW11_ENC_PARAMS(dst, instance) (dst = (((nvme_config_xcoder_config_set_enc_params << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
580 #define CONFIG_INSTANCE_SET_DW11_ENC_FRAME_PARAMS(dst, instance) (dst = (((nvme_config_xcoder_config_set_enc_frame_params << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
581 #define CONFIG_INSTANCE_SET_DW11_FLUSH(dst, instance) (dst = (((nvme_config_xcoder_config_flush << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
582 #define CONFIG_INSTANCE_SET_DW11_UPDATE_PARAMS(dst, instance) (dst = (((nvme_config_xcoder_config_update_enc_params << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
583 #define CONFIG_INSTANCE_SET_DW11_ALLOC_FRAME(dst, instance) (dst = (((nvme_config_xcoder_config_alloc_frame << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
584 #define CONFIG_INSTANCE_SET_DW11_WRITE_LEN(dst, instance) (dst = (((nvme_config_xcoder_config_set_write_legth << 16) & 0xFFFF0000UL) | (instance & 0xFFFFUL)))
585 
586 #define CONFIG_INSTANCE_SET_DW11_AI_PARAMS(dst, instance) \
587  (dst = (((nvme_config_xcoder_config_set_network_binary << 16) & \
588  0xFFFF0000UL) | \
589  (instance & 0xFFFFUL)))
590 
591 #define CONFIG_INSTANCE_SET_DW15_SIZE(dst, size) (dst = (size & 0xFFFFFFFFUL))
592 #define RECYCLE_BUFFER_SET_DW10_BUFID(dst, bid) (dst = (bid & 0xFFFFUL))
593 
594 #ifndef XCODER_IO_RW_ENABLED
596  ni_device_handle_t fd,
597  ni_nvme_command_t *p_ni_nvme_cmd,
598  uint32_t data_len, void *data,
599  uint32_t *pResult);
600 
601 int32_t ni_nvme_send_io_cmd(ni_nvme_opcode_t opcode, ni_device_handle_t fd,
602  ni_nvme_command_t *p_ni_nvme_cmd, uint32_t data_len,
603  void *data, uint32_t *pResult);
604 #endif
605 
607  ni_device_handle_t fd,
608  ni_nvme_command_t *p_ni_nvme_cmd,
609  uint32_t data_len, void *data,
610  uint32_t *pResult);
611 
612 ni_retcode_t ni_nvme_check_error_code(int rc, int opcode, uint32_t xcoder_type,
613  uint32_t hw_id, uint32_t *inst_id);
614 
616  int max_handles);
617 
618 
619 #ifdef __linux__
620 int32_t ni_nvme_send_admin_pass_through_command(ni_device_handle_t fd, ni_nvme_passthrough_cmd_t* cmd);
621 int32_t ni_nvme_send_io_pass_through_command(ni_device_handle_t fd, ni_nvme_passthrough_cmd_t* cmd);
622 #endif
623 
624 /********************* transcoder through io read/write command ***********************/
625 #define NI_DATA_BUFFER_LEN 4096
626 #define LBA_BIT_OFFSET 12 //logic block size = 4K
627 
628 //supposed LBA 4K aligned
629 #define NI_SUB_BIT_OFFSET 4
630 #define NI_OP_BIT_OFFSET 8
631 #define NI_INSTANCE_TYPE_OFFSET 19
632 #define NI_SESSION_ID_OFFSET 22
633 
634 #define NI_SESSION_ID_SHIFT_HI 3
635 
636 #define MBs(xMB) ((xMB)*1024*1024)
637 #define MBs_to_4k(xMB) ((xMB)*1024*1024/4096) // MB to 4K
638 
639 #define START_OFFSET_IN_4K MBs_to_4k(512) // 0x00 -- 0x20000
640 
641 #define CTL_OFFSET_IN_4K(op,sub,subtype) (START_OFFSET_IN_4K+(((op)<<NI_OP_BIT_OFFSET) + \
642  ((sub)<<NI_SUB_BIT_OFFSET)+subtype)) // 0x20000 -- 0x28000, each (op,sub,subtype) has 4k bytes
643 #define RD_OFFSET_IN_4K \
644  (START_OFFSET_IN_4K + MBs_to_4k(128)) // 0x28000 -- 0x38000
645 
646 #define WR_OFFSET_IN_4K \
647  (RD_OFFSET_IN_4K + MBs_to_4k(256)) // 0x38000 -- 0x48000
648 
649 #define LOAD_OFFSET_IN_4K \
650  (WR_OFFSET_IN_4K + MBs_to_4k(256)) // 0x48000 -- 0x50000
651 
652 #define WR_METADATA_OFFSET_IN_4K \
653  (MBs_to_4k(1024) + MBs_to_4k(256)) // 0x50000 -- 0x58000
654 
655 #define DOWNLOAD_OFFSET_IN_4K \
656  (WR_METADATA_OFFSET_IN_4K + MBs_to_4k(128)) // 0x58000 -- 0x68000
657 
658 // total 0x00000 -- 0x80000
659 
660 #define DUMP_LOG_OFFSET_IN_4K (LOAD_OFFSET_IN_4K + MBs_to_4k(8))
661 
662 #define NVME_LOG_OFFSET_IN_4K (DUMP_LOG_OFFSET_IN_4K)
663 #define EP_LOG_OFFSET_IN_4K (NVME_LOG_OFFSET_IN_4K + MBs_to_4k(1))
664 #define DP_LOG_OFFSET_IN_4K (EP_LOG_OFFSET_IN_4K + MBs_to_4k(1))
665 #define TP_LOG_OFFSET_IN_4K (DP_LOG_OFFSET_IN_4K + MBs_to_4k(1))
666 #define FP_LOG_OFFSET_IN_4K (TP_LOG_OFFSET_IN_4K + MBs_to_4k(1))
667 
668 #define HIGH_OFFSET_IN_4K(sid, instance) \
669  ((((sid & 0x1FFUL) << NI_SESSION_ID_SHIFT_HI) | (instance)) \
670  << NI_INSTANCE_TYPE_OFFSET) // 1024MB +128MB from range 0x0 to 0x40000 + 0x40000 to 0x48000
671 #define GAP(opcode) ((opcode) - nvme_admin_cmd_xcoder_open)
672 
673 /************read/write command macro*******************/
674 //write instance
675 #define WRITE_INSTANCE_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + WR_OFFSET_IN_4K
676 // write separate metadata
677 #define WRITE_METADATA_W(sid, instance) \
678  HIGH_OFFSET_IN_4K(sid, instance) + WR_METADATA_OFFSET_IN_4K
679 
680 //read instance
681 #define READ_INSTANCE_R(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + RD_OFFSET_IN_4K
682 
683 // download hwframe
684 #define DOWNLOAD_FRAMEIDX_R(frame_id) ((frame_id & 0xFFFUL) << NI_INSTANCE_TYPE_OFFSET) + DOWNLOAD_OFFSET_IN_4K
685 
686 /************control command macro**********************/
687 //identify
688 #define IDENTIFY_DEVICE_R HIGH_OFFSET_IN_4K(0,0) + CTL_OFFSET_IN_4K(GAP(0xD9), 1, 0)
689 
690 //open
691 #define OPEN_GET_SID_R(instance) HIGH_OFFSET_IN_4K(0,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_open), \
692  nvme_open_xcoder_create_session,2)
693 #define OPEN_SESSION_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_open), \
694  nvme_open_xcoder_create_session,0)
695 #define OPEN_SESSION_CODEC(instance, codec, param) HIGH_OFFSET_IN_4K((param & 0x3F),instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_open), \
696  nvme_open_xcoder_create_session,codec)
697 #define OPEN_ADD_CODEC(instance, codec, param) HIGH_OFFSET_IN_4K(param,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_open), \
698  nvme_open_xcoder_add_session,codec)
699 
700 
701 //close
702 #define CLOSE_SESSION_R(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_close), \
703  nvme_close_xcoder_destroy_session,0)
704 
705 //query
706 #define QUERY_SESSION_R(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
707  nvme_query_xcoder_query_session,0)
708 #define QUERY_SESSION_STATS_R(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
709  nvme_query_xcoder_query_session,nvme_query_xcoder_session_get_stats)
710 #define QUERY_INSTANCE_STATUS_R(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
711  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_get_status)
712 
713 #define QUERY_INSTANCE_CUR_STATUS_INFO_R(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
714  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_get_current_status)
715 #define QUERY_INSTANCE_AI_INFO_R(sid, instance) \
716  HIGH_OFFSET_IN_4K(sid, instance) + \
717  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
718  nvme_query_xcoder_query_instance, \
719  nvme_query_xcoder_instance_read_ai_hw_output)
720 #define QUERY_INSTANCE_STREAM_INFO_R(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
721  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_get_stream_info)
722 #define QUERY_INSTANCE_EOS_R(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
723  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_get_end_of_output)
724 #define QUERY_INSTANCE_RBUFF_SIZE_R(sid, instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
725  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_read_buf_size)
726 #define QUERY_INSTANCE_WBUFF_SIZE_R(sid, instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
727  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_write_buf_size)
728 #define QUERY_INSTANCE_WBUFF_SIZE_R_BY_EP(sid, instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
729  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_write_buf_size_by_ep)
730 #define QUERY_INSTANCE_RBUFF_SIZE_BUSY_R(sid, instance) \
731  HIGH_OFFSET_IN_4K(sid, instance) + \
732  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
733  nvme_query_xcoder_query_instance, \
734  nvme_query_xcoder_instance_read_buf_size_busy)
735 #define QUERY_INSTANCE_WBUFF_SIZE_BUSY_R(sid, instance) \
736  HIGH_OFFSET_IN_4K(sid, instance) + \
737  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
738  nvme_query_xcoder_query_instance, \
739  nvme_query_xcoder_instance_write_buf_size_busy)
740 #define QUERY_INSTANCE_UPLOAD_ID_R(sid, instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
741  nvme_query_xcoder_query_instance,nvme_query_xcoder_instance_upload_idx)
742 #define QUERY_INSTANCE_ACQUIRE_BUF(sid, instance) \
743  HIGH_OFFSET_IN_4K(sid, instance) + \
744  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
745  nvme_query_xcoder_query_instance, \
746  nvme_query_xcoder_instance_acquire_buf)
747 
748 #define QUERY_INSTANCE_HW_OUT_SIZE_R(sid, instance) \
749  HIGH_OFFSET_IN_4K(sid, instance) + \
750  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
751  nvme_query_xcoder_query_instance, \
752  nvme_query_xcoder_instance_read_output_buf_size)
753 
754 #define QUERY_INSTANCE_NL_SIZE_R(sid, instance) \
755  HIGH_OFFSET_IN_4K(sid, instance) + \
756  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
757  nvme_query_xcoder_query_instance, \
758  nvme_query_xcoder_instance_network_layer_size)
759 #define QUERY_INSTANCE_NL_R(sid, instance) \
760  HIGH_OFFSET_IN_4K(sid, instance) + \
761  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
762  nvme_query_xcoder_query_instance, \
763  nvme_query_xcoder_instance_read_network_layer)
764 
765 #define QUERY_INSTANCE_NL_SIZE_V2_R(sid, instance) \
766  HIGH_OFFSET_IN_4K(sid, instance) + \
767  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
768  nvme_query_xcoder_query_instance, \
769  nvme_query_xcoder_instance_network_layer_size_v2)
770 
771 #define QUERY_INSTANCE_NL_V2_R(sid, instance) \
772  HIGH_OFFSET_IN_4K(sid, instance) + \
773  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
774  nvme_query_xcoder_query_instance, \
775  nvme_query_xcoder_instance_read_network_layer_v2)
776 
777 #define QUERY_INSTANCE_METRICS_R(sid, instance) \
778  HIGH_OFFSET_IN_4K(sid, instance) + \
779  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
780  nvme_query_xcoder_query_instance, \
781  nvme_query_xcoder_instance_read_perf_metrics)
782 
783 #define QUERY_GENERAL_GET_STATUS_R(instance) HIGH_OFFSET_IN_4K(0,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
784  nvme_query_xcoder_query_general,nvme_query_xcoder_general_get_status)
785 
786 #define QUERY_DETAIL_GET_STATUS_R(instance) HIGH_OFFSET_IN_4K(0,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
787  nvme_query_xcoder_query_general,nvme_query_xcoder_general_get_detail_info)
788 #define QUERY_DETAIL_GET_STATUS_V1_R(instance) HIGH_OFFSET_IN_4K(0,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_query), \
789  nvme_query_xcoder_query_general,nvme_query_xcoder_general_get_detail_info_v1)
790 
791 #define QUERY_GET_NVME_STATUS_R HIGH_OFFSET_IN_4K(0,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_general), \
792  nvme_xcoder_general_status_query, 0)
793 #define QUERY_GET_VERSIONS_R HIGH_OFFSET_IN_4K(0,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_general), \
794  nvme_xcoder_general_versions_query, 0)
795 
796 #define QUERY_GET_NS_VF_R HIGH_OFFSET_IN_4K(0,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_general), \
797  nvme_xcoder_general_nsvf_query, 0)
798 #define QUERY_GET_TEMPERATURE_R HIGH_OFFSET_IN_4K(0,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_general), \
799  nvme_xcoder_general_temperature_query, 0)
800 #define QUERY_GET_EXTTRA_INFO_R HIGH_OFFSET_IN_4K(0,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_general), \
801  nvme_xcoder_general_extra_info_query, 0)
802 
803 //config instance
804 #define CONFIG_INSTANCE_SetSOS_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
805  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_sos)
806 #define CONFIG_INSTANCE_SetEOS_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
807  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_eos)
808 #define CONFIG_INSTANCE_Flush_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
809  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_flush)
810 
811 #define CONFIG_INSTANCE_SetDecPara_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
812  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_dec_params)
813 #define CONFIG_INSTANCE_SetScalerPara_W(sid, instance) \
814  HIGH_OFFSET_IN_4K(sid, instance) + \
815  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
816  nvme_config_xcoder_config_instance, \
817  nvme_config_xcoder_config_set_scaler_params)
818 #define CONFIG_INSTANCE_SetScalerAlloc_W(sid, instance) \
819  HIGH_OFFSET_IN_4K(sid, instance) + \
820  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
821  nvme_config_xcoder_config_instance, \
822  nvme_config_xcoder_config_alloc_frame)
823 
824 #define CONFIG_INSTANCE_SetScalerDrawBoxPara_W(sid, instance) \
825  HIGH_OFFSET_IN_4K(sid, instance) + \
826  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
827  nvme_config_xcoder_config_instance, \
828  nvme_config_xcoder_config_set_scaler_drawbox_params)
829 
830 #define CONFIG_INSTANCE_SetScalerWatermarkPara_W(sid, instance) \
831  HIGH_OFFSET_IN_4K(sid, instance) + \
832  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
833  nvme_config_xcoder_config_instance, \
834  nvme_config_xcoder_config_set_scaler_watermark_params)
835 
836 #define CONFIG_INSTANCE_SetEncPara_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
837  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_enc_params)
838 #define CONFIG_INSTANCE_UpdateEncPara_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
839  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_update_enc_params)
840 #define CONFIG_INSTANCE_SetEncFramePara_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
841  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_enc_frame_params)
842 #define CONFIG_INSTANCE_SetPktSize_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
843  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_write_legth)
844 #define CONFIG_INSTANCE_SetSeqChange_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
845  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_sequence_change)
846 #define CONFIG_INSTANCE_SetEncRoiQpMap_W(sid,instance) HIGH_OFFSET_IN_4K(sid,instance) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
847  nvme_config_xcoder_config_instance,nvme_config_xcoder_config_set_roi_qp_map)
848 #define CONFIG_INSTANCE_SetAiPara_W(sid, instance) \
849  HIGH_OFFSET_IN_4K(sid, instance) + \
850  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
851  nvme_config_xcoder_config_instance, \
852  nvme_config_xcoder_config_set_network_binary)
853 #define CONFIG_INSTANCE_SetAiHVSPlus_W(sid, instance) \
854  HIGH_OFFSET_IN_4K(sid, instance) + \
855  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
856  nvme_config_xcoder_config_instance, \
857  nvme_config_xcoder_config_hvsplus)
858 #define CONFIG_INSTANCE_SetAiFrm_W(sid, instance) \
859  HIGH_OFFSET_IN_4K(sid, instance) + \
860  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
861  nvme_config_xcoder_config_instance, \
862  nvme_config_xcoder_config_alloc_frame)
863 
864 #define CONFIG_INSTANCE_SetP2P_W(sid,instance) \
865  HIGH_OFFSET_IN_4K(sid, instance) + \
866  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
867  nvme_config_xcoder_config_instance, \
868  nvme_config_xcoder_config_set_p2p_params)
869 
870 //config session
871 #define CONFIG_SESSION_KeepAlive_W(sid) HIGH_OFFSET_IN_4K(sid,1) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
872  nvme_config_xcoder_config_session,nvme_config_xcoder_config_session_keep_alive)
873 #define CONFIG_SESSION_Read_W(sid) HIGH_OFFSET_IN_4K(sid,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
874  nvme_config_xcoder_config_session,nvme_config_xcoder_config_session_read)
875 #define CONFIG_SESSION_Write_W(sid) HIGH_OFFSET_IN_4K(sid,0) + CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
876  nvme_config_xcoder_config_session,nvme_config_xcoder_config_session_write)
877 
878 #define CLEAR_INSTANCE_BUF_W(frame_id) CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_recycle_buffer), 0, (frame_id & 0x00FF)) + (((frame_id & 0xFF00)>>8)<<NI_INSTANCE_TYPE_OFFSET)
879 
880 #define SEND_P2P_BUF_W CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_p2p_send), 0, 0)
881 
882 #define CONFIG_SESSION_KeepAliveTimeout_W(sid) \
883  HIGH_OFFSET_IN_4K(sid, 0) + \
884  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
885  nvme_config_xcoder_config_session, \
886  nvme_config_xcoder_config_session_keep_alive_timeout)
887 
888 #define CONFIG_SESSION_SWVersion_W(sid) \
889  HIGH_OFFSET_IN_4K(sid, 0) + \
890  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
891  nvme_config_xcoder_config_session, \
892  nvme_config_xcoder_config_session_sw_version)
893 
894 #define CONFIG_GLOBAL_NAMESPACE_NUM \
895  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
896  nvme_config_xcoder_config_global, \
897  nvme_config_xcoder_config_namespace_num)
898 
899 #define CONFIG_SESSION_DDR_PRIORITY_W(sid) \
900  HIGH_OFFSET_IN_4K(sid, 0) + \
901  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
902  nvme_config_xcoder_config_session, \
903  nvme_config_xcoder_config_ddr_priority)
904 
905 #define CONFIG_SESSION_FRAME_COPY_W(sid) \
906  HIGH_OFFSET_IN_4K(sid, 0) + \
907  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
908  nvme_config_xcoder_config_session, \
909  nvme_config_xcoder_config_frame_clone)
910 
911 #define CONFIG_INSTANCE_UploadModel_W(sid,instance) \
912  HIGH_OFFSET_IN_4K(sid, instance) + \
913  CTL_OFFSET_IN_4K(GAP(nvme_admin_cmd_xcoder_config), \
914  nvme_config_xcoder_config_instance, \
915  nvme_config_xcoder_config_set_upload_load)
916 
917 int32_t ni_nvme_send_read_cmd(ni_device_handle_t handle, ni_event_handle_t event_handle, void *p_data, uint32_t data_len, uint32_t lba);
918 int32_t ni_nvme_send_write_cmd(ni_device_handle_t handle, ni_event_handle_t event_handle, void *p_data, uint32_t data_len, uint32_t lba);
919 
920 #ifdef __cplusplus
921 }
922 #endif
_ni_nvme_identity::fw_repo_info_padding
uint8_t fw_repo_info_padding[2]
Definition: ni_nvme.h:223
nvme_admin_cmd_xcoder_p2p_send
@ nvme_admin_cmd_xcoder_p2p_send
Definition: ni_nvme.h:330
_ni_nvme_identity::fw_commit_hash
uint8_t fw_commit_hash[41]
Definition: ni_nvme.h:220
_nvme_query_xcoder_instance_subtype
_nvme_query_xcoder_instance_subtype
Definition: ni_nvme.h:367
_ni_nvme_identity::memory_cfg
uint8_t memory_cfg
Definition: ni_nvme.h:225
_ni_nvme_identity_xcoder_hw::hw_reserved
uint8_t hw_reserved[9]
Definition: ni_nvme.h:85
_ni_nvme_id_power_state::aui8Rsvd23
uint8_t aui8Rsvd23[9]
Definition: ni_nvme.h:68
_ni_nvme_identity_xcoder_hw::hw_min_video_width
uint16_t hw_min_video_width
Definition: ni_nvme.h:81
nvme_admin_cmd_identify
@ nvme_admin_cmd_identify
Definition: ni_nvme.h:306
_ni_nvme_identity::xcoder_cnt
uint8_t xcoder_cnt[14]
Definition: ni_nvme.h:231
_ni_nvme_id_power_state::ui8Flags
uint8_t ui8Flags
Definition: ni_nvme.h:56
nvme_admin_cmd_delete_sq
@ nvme_admin_cmd_delete_sq
Definition: ni_nvme.h:301
nvme_write_xcoder_write_instance
@ nvme_write_xcoder_write_instance
Definition: ni_nvme.h:352
_ni_nvme_identity::ui32Hmmin
uint32_t ui32Hmmin
Definition: ni_nvme.h:121
nvme_query_xcoder_instance_get_status
@ nvme_query_xcoder_instance_get_status
Definition: ni_nvme.h:371
_ni_nvme_identity::hw3_codec_format
uint8_t hw3_codec_format
Definition: ni_nvme.h:208
_nvme_query_xcoder_subtype
_nvme_query_xcoder_subtype
Definition: ni_nvme.h:355
ni_nvme_send_read_cmd
int32_t ni_nvme_send_read_cmd(ni_device_handle_t handle, ni_event_handle_t event_handle, void *p_data, uint32_t data_len, uint32_t lba)
Compose an io read command.
Definition: ni_nvme.c:528
_ni_nvme_identity::hw1_reserved
uint8_t hw1_reserved[9]
Definition: ni_nvme.h:190
_ni_nvme_identity::hw0_max_video_height
uint16_t hw0_max_video_height
Definition: ni_nvme.h:172
_ni_nvme_identity::aui8FwLoaderRev
uint8_t aui8FwLoaderRev[8]
Definition: ni_nvme.h:149
ni_nvme_opcode_t
enum _ni_nvme_opcode ni_nvme_opcode_t
ni_nvme_identity_xcoder_hw_t
struct _ni_nvme_identity_xcoder_hw ni_nvme_identity_xcoder_hw_t
nvme_query_xcoder_instance_read_buf_size
@ nvme_query_xcoder_instance_read_buf_size
Definition: ni_nvme.h:379
_nvme_xcoder_general_subtype
_nvme_xcoder_general_subtype
Definition: ni_nvme.h:442
_ni_nvme_identity::hw1_min_video_width
uint16_t hw1_min_video_width
Definition: ni_nvme.h:186
nvme_admin_cmd_security_recv
@ nvme_admin_cmd_security_recv
Definition: ni_nvme.h:317
_ni_nvme_identity::hw3_video_level
uint8_t hw3_video_level
Definition: ni_nvme.h:215
_ni_nvme_id_power_state::ui8IdleScale
uint8_t ui8IdleScale
Definition: ni_nvme.h:64
_ni_nvme_identity::ui32Ver
uint32_t ui32Ver
Definition: ni_nvme.h:103
nvme_xcoder_general_temperature_query
@ nvme_xcoder_general_temperature_query
Definition: ni_nvme.h:447
nvme_query_xcoder_general_get_detail_info_v1
@ nvme_query_xcoder_general_get_detail_info_v1
Definition: ni_nvme.h:396
_ni_nvme_identity::xcoder_num_h265_encoder_hw
uint8_t xcoder_num_h265_encoder_hw
Definition: ni_nvme.h:163
_ni_nvme_id_power_state::ui8WriteTput
uint8_t ui8WriteTput
Definition: ni_nvme.h:61
_ni_nvme_identity::hw0_codec_format
uint8_t hw0_codec_format
Definition: ni_nvme.h:169
_ni_nvme_identity::hw0_video_profile
uint8_t hw0_video_profile
Definition: ni_nvme.h:175
nvme_config_xcoder_instance_write_buf_size_busy_place_holder
@ nvme_config_xcoder_instance_write_buf_size_busy_place_holder
Definition: ni_nvme.h:439
ni_nvme_check_error_code
ni_retcode_t ni_nvme_check_error_code(int rc, int opcode, uint32_t xcoder_type, uint32_t hw_id, uint32_t *inst_id)
Check f/w error return code, and if it's a fatal one, terminate application's decoding/encoding proce...
Definition: ni_nvme.c:62
_ni_nvme_identity::hw0_id
uint8_t hw0_id
Definition: ni_nvme.h:166
_ni_nvme_identity::hw1_video_profile
uint8_t hw1_video_profile
Definition: ni_nvme.h:188
ni_nvme_send_admin_cmd
int32_t ni_nvme_send_admin_cmd(ni_nvme_admin_opcode_t opcode, ni_device_handle_t fd, ni_nvme_command_t *p_ni_nvme_cmd, uint32_t data_len, void *data, uint32_t *pResult)
Compose a nvme admin command.
Definition: ni_nvme.c:324
_ni_nvme_identity::xcoder_reserved
uint8_t xcoder_reserved[11]
Definition: ni_nvme.h:164
_ni_nvme_identity::ui16Wctemp
uint16_t ui16Wctemp
Definition: ni_nvme.h:117
nvme_admin_cmd_xcoder_read
@ nvme_admin_cmd_xcoder_read
Definition: ni_nvme.h:322
nvme_config_xcoder_config_set_scaler_drawbox_params
@ nvme_config_xcoder_config_set_scaler_drawbox_params
Definition: ni_nvme.h:425
ni_nvme_enumerate_devices
int ni_nvme_enumerate_devices(char ni_devices[][NI_MAX_DEVICE_NAME_LEN], int max_handles)
nvme_xcoder_general_nsvf_query
@ nvme_xcoder_general_nsvf_query
Definition: ni_nvme.h:446
_ni_nvme_identity::hw2_min_video_height
uint16_t hw2_min_video_height
Definition: ni_nvme.h:200
_ni_nvme_identity::ui8Mdts
uint8_t ui8Mdts
Definition: ni_nvme.h:101
nvme_query_xcoder_instance_get_stream_info
@ nvme_query_xcoder_instance_get_stream_info
Definition: ni_nvme.h:373
_ni_nvme_command::cdw12
uint32_t cdw12
Definition: ni_nvme.h:46
_ni_nvme_identity::ui16Awupf
uint16_t ui16Awupf
Definition: ni_nvme.h:135
_ni_nvme_identity::ai8Mn
uint8_t ai8Mn[40]
Definition: ni_nvme.h:96
_ni_nvme_identity_xcoder_hw::hw_max_number_of_contexts
uint8_t hw_max_number_of_contexts
Definition: ni_nvme.h:75
nvme_query_xcoder_instance_get_current_status
@ nvme_query_xcoder_instance_get_current_status
Definition: ni_nvme.h:372
_ni_nvme_identity::hw3_codec_type
uint8_t hw3_codec_type
Definition: ni_nvme.h:209
nvme_admin_cmd_set_features
@ nvme_admin_cmd_set_features
Definition: ni_nvme.h:308
nvme_admin_cmd_create_sq
@ nvme_admin_cmd_create_sq
Definition: ni_nvme.h:302
_ni_nvme_identity::hw1_max_1080p_fps
uint8_t hw1_max_1080p_fps
Definition: ni_nvme.h:181
nvme_close_xcoder_destroy_session
@ nvme_close_xcoder_destroy_session
Definition: ni_nvme.h:342
nvme_admin_cmd_download_fw
@ nvme_admin_cmd_download_fw
Definition: ni_nvme.h:313
_ni_nvme_identity::hw2_max_number_of_contexts
uint8_t hw2_max_number_of_contexts
Definition: ni_nvme.h:193
_ni_nvme_command::cdw11
uint32_t cdw11
Definition: ni_nvme.h:45
nvme_config_xcoder_config_set_p2p_params
@ nvme_config_xcoder_config_set_p2p_params
Definition: ni_nvme.h:426
_nvme_write_xcoder_subtype
_nvme_write_xcoder_subtype
Definition: ni_nvme.h:350
ni_nvme_id_power_state_t
struct _ni_nvme_id_power_state ni_nvme_id_power_state_t
nvme_open_xcoder_add_session
@ nvme_open_xcoder_add_session
Definition: ni_nvme.h:337
_ni_nvme_identity::hw0_min_video_width
uint16_t hw0_min_video_width
Definition: ni_nvme.h:173
_ni_nvme_identity::xcoder_num_h265_decoder_hw
uint8_t xcoder_num_h265_decoder_hw
Definition: ni_nvme.h:162
nvme_query_xcoder_instance_write_buf_size_busy
@ nvme_query_xcoder_instance_write_buf_size_busy
Definition: ni_nvme.h:389
NI_MAX_DEVICES_PER_HW_INSTANCE
#define NI_MAX_DEVICES_PER_HW_INSTANCE
Definition: ni_defs.h:239
nvme_query_xcoder_instance_read_network_layer
@ nvme_query_xcoder_instance_read_network_layer
Definition: ni_nvme.h:386
_ni_nvme_identity::ui16Vid
uint16_t ui16Vid
Definition: ni_nvme.h:93
_ni_nvme_identity::hw3_video_profile
uint8_t hw3_video_profile
Definition: ni_nvme.h:214
nvme_query_xcoder_instance_subtype_t
enum _nvme_query_xcoder_instance_subtype nvme_query_xcoder_instance_subtype_t
nvme_query_xcoder_instance_dec_place_holder
@ nvme_query_xcoder_instance_dec_place_holder
Definition: ni_nvme.h:384
nvme_query_xcoder_instance_write_buf_size_by_ep
@ nvme_query_xcoder_instance_write_buf_size_by_ep
Definition: ni_nvme.h:377
_ni_nvme_identity::hw0_max_number_of_contexts
uint8_t hw0_max_number_of_contexts
Definition: ni_nvme.h:167
nvme_config_xcoder_config_set_network_binary
@ nvme_config_xcoder_config_set_network_binary
Definition: ni_nvme.h:431
nvme_admin_cmd_create_cq
@ nvme_admin_cmd_create_cq
Definition: ni_nvme.h:305
nvme_config_xcoder_config_set_sequence_change
@ nvme_config_xcoder_config_set_sequence_change
Definition: ni_nvme.h:436
nvme_query_xcoder_instance_read_network_layer_v2
@ nvme_query_xcoder_instance_read_network_layer_v2
Definition: ni_nvme.h:376
_ni_nvme_identity::device_is_xcoder
uint8_t device_is_xcoder
Definition: ni_nvme.h:155
_ni_nvme_identity::ui16Mtfa
uint16_t ui16Mtfa
Definition: ni_nvme.h:119
_ni_nvme_identity_xcoder_hw::hw_min_video_height
uint16_t hw_min_video_height
Definition: ni_nvme.h:82
_nvme_close_xcoder_subtype
_nvme_close_xcoder_subtype
Definition: ni_nvme.h:340
nvme_admin_cmd_ns_attach
@ nvme_admin_cmd_ns_attach
Definition: ni_nvme.h:314
_ni_nvme_identity::ui8NegPcieLnkWid
uint8_t ui8NegPcieLnkWid
Definition: ni_nvme.h:147
_ni_nvme_id_power_state
Definition: ni_nvme.h:52
nvme_config_xcoder_config_session_read
@ nvme_config_xcoder_config_session_read
Definition: ni_nvme.h:409
_ni_nvme_identity::xcoder_num_devices
uint8_t xcoder_num_devices
Definition: ni_nvme.h:230
_ni_nvme_identity::ui32Rtd3e
uint32_t ui32Rtd3e
Definition: ni_nvme.h:105
nvme_admin_cmd_format_nvm
@ nvme_admin_cmd_format_nvm
Definition: ni_nvme.h:315
nvme_read_xcoder_subtype_t
enum _nvme_read_xcoder_subtype nvme_read_xcoder_subtype_t
_ni_nvme_command
Definition: ni_nvme.h:40
nvme_config_xcoder_config_instance
@ nvme_config_xcoder_config_instance
Definition: ni_nvme.h:402
nvme_admin_cmd_get_features
@ nvme_admin_cmd_get_features
Definition: ni_nvme.h:309
_ni_nvme_identity::hw0_max_video_width
uint16_t hw0_max_video_width
Definition: ni_nvme.h:171
_nvme_query_xcoder_general_subtype
_nvme_query_xcoder_general_subtype
Definition: ni_nvme.h:392
nvme_query_xcoder_subtype_t
enum _nvme_query_xcoder_subtype nvme_query_xcoder_subtype_t
_ni_nvme_identity::ui16ChipVer
uint16_t ui16ChipVer
Definition: ni_nvme.h:148
_ni_nvme_identity::hw3_id
uint8_t hw3_id
Definition: ni_nvme.h:205
_ni_nvme_identity::hw0_video_level
uint8_t hw0_video_level
Definition: ni_nvme.h:176
nvme_config_xcoder_config_set_write_legth
@ nvme_config_xcoder_config_set_write_legth
Definition: ni_nvme.h:434
nvme_config_xcoder_config_set_roi_qp_map
@ nvme_config_xcoder_config_set_roi_qp_map
Definition: ni_nvme.h:433
nvme_query_xcoder_instance_upload_idx
@ nvme_query_xcoder_instance_upload_idx
Definition: ni_nvme.h:381
ni_retcode_t
ni_retcode_t
Definition: ni_defs.h:425
_ni_nvme_identity::ui8Sqes
uint8_t ui8Sqes
Definition: ni_nvme.h:126
_ni_nvme_identity::xcoder_num_h264_encoder_hw
uint8_t xcoder_num_h264_encoder_hw
Definition: ni_nvme.h:161
_ni_nvme_identity::ui32Rtd3r
uint32_t ui32Rtd3r
Definition: ni_nvme.h:104
nvme_close_xcoder_subtype_t
enum _nvme_close_xcoder_subtype nvme_close_xcoder_subtype_t
nvme_config_xcoder_config_session_write
@ nvme_config_xcoder_config_session_write
Definition: ni_nvme.h:410
_ni_nvme_identity::aui8TotalRawCap
uint8_t aui8TotalRawCap[8]
Definition: ni_nvme.h:145
_ni_nvme_identity::ui16Cntlid
uint16_t ui16Cntlid
Definition: ni_nvme.h:102
_ni_nvme_identity::ui32Oaes
uint32_t ui32Oaes
Definition: ni_nvme.h:106
_ni_nvme_identity_xcoder_hw::hw_max_video_height
uint16_t hw_max_video_height
Definition: ni_nvme.h:80
nvme_config_xcoder_config_set_enc_frame_params
@ nvme_config_xcoder_config_set_enc_frame_params
Definition: ni_nvme.h:432
_ni_nvme_identity::fw_build_time
uint8_t fw_build_time[26]
Definition: ni_nvme.h:221
_ni_nvme_identity::hw1_max_video_width
uint16_t hw1_max_video_width
Definition: ni_nvme.h:184
_ni_nvme_write_complete_dw0_t::reserved
uint32_t reserved
Definition: ni_nvme.h:456
nvme_read_xcoder_read_instance
@ nvme_read_xcoder_read_instance
Definition: ni_nvme.h:347
_ni_nvme_identity::ui8Frmw
uint8_t ui8Frmw
Definition: ni_nvme.h:111
nvme_xcoder_general_extra_info_query
@ nvme_xcoder_general_extra_info_query
Definition: ni_nvme.h:448
_ni_nvme_identity_xcoder_hw::hw_max_video_width
uint16_t hw_max_video_width
Definition: ni_nvme.h:79
nvme_query_xcoder_query_general
@ nvme_query_xcoder_query_general
Definition: ni_nvme.h:359
_ni_nvme_identity::hw0_max_1080p_fps
uint8_t hw0_max_1080p_fps
Definition: ni_nvme.h:168
_ni_nvme_identity
Definition: ni_nvme.h:89
_ni_nvme_id_power_state::ui8Rsvd19
uint8_t ui8Rsvd19
Definition: ni_nvme.h:65
nvme_open_xcoder_create_session
@ nvme_open_xcoder_create_session
Definition: ni_nvme.h:336
nvme_config_xcoder_config_set_scaler_watermark_params
@ nvme_config_xcoder_config_set_scaler_watermark_params
Definition: ni_nvme.h:438
ni_nvme_send_io_cmd_thru_admin_queue
int32_t ni_nvme_send_io_cmd_thru_admin_queue(ni_nvme_admin_opcode_t opcode, ni_device_handle_t fd, ni_nvme_command_t *p_ni_nvme_cmd, uint32_t data_len, void *data, uint32_t *pResult)
_ni_nvme_identity::hw1_codec_format
uint8_t hw1_codec_format
Definition: ni_nvme.h:182
_ni_nvme_command::cdw10
uint32_t cdw10
Definition: ni_nvme.h:44
_ni_nvme_identity::hw2_id
uint8_t hw2_id
Definition: ni_nvme.h:192
nvme_admin_cmd_xcoder_open
@ nvme_admin_cmd_xcoder_open
Definition: ni_nvme.h:318
_ni_nvme_identity::sed_support
uint8_t sed_support
Definition: ni_nvme.h:156
_ni_nvme_id_power_state::ui16ActivePower
uint16_t ui16ActivePower
Definition: ni_nvme.h:66
ni_nvme_write_complete_dw0_t
struct _ni_nvme_write_complete_dw0_t ni_nvme_write_complete_dw0_t
ni_defs.h
Common NETINT definitions used by all modules.
_ni_nvme_identity::ui32Hmpre
uint32_t ui32Hmpre
Definition: ni_nvme.h:120
_ni_nvme_id_power_state::ui8WriteLat
uint8_t ui8WriteLat
Definition: ni_nvme.h:62
_ni_nvme_identity_xcoder_hw::hw_codec_type
uint8_t hw_codec_type
Definition: ni_nvme.h:78
_ni_nvme_identity::hw3_max_video_height
uint16_t hw3_max_video_height
Definition: ni_nvme.h:211
_ni_nvme_identity::ui8Npss
uint8_t ui8Npss
Definition: ni_nvme.h:114
_ni_nvme_identity::hw2_reserved
uint8_t hw2_reserved[9]
Definition: ni_nvme.h:203
nvme_admin_cmd_xcoder_load
@ nvme_admin_cmd_xcoder_load
Definition: ni_nvme.h:329
_ni_nvme_identity::hw1_id
uint8_t hw1_id
Definition: ni_nvme.h:179
nvme_query_xcoder_session_subtype_t
enum _nvme_query_xcoder_session_subtype nvme_query_xcoder_session_subtype_t
nvme_config_xcoder_subtype_t
enum _nvme_config_xcoder_subtype nvme_config_xcoder_subtype_t
_ni_nvme_identity::aui8Rsvd540
uint8_t aui8Rsvd540[1508]
Definition: ni_nvme.h:141
_ni_nvme_command::cdw14
uint32_t cdw14
Definition: ni_nvme.h:48
_ni_nvme_identity::ui8Acl
uint8_t ui8Acl
Definition: ni_nvme.h:109
nvme_admin_cmd_activate_fw
@ nvme_admin_cmd_activate_fw
Definition: ni_nvme.h:312
nvme_admin_cmd_ns_mgmt
@ nvme_admin_cmd_ns_mgmt
Definition: ni_nvme.h:311
_ni_nvme_identity::hw1_max_number_of_contexts
uint8_t hw1_max_number_of_contexts
Definition: ni_nvme.h:180
_ni_nvme_write_complete_dw0_t::frame_index
uint32_t frame_index
Definition: ni_nvme.h:455
nvme_xcoder_general_versions_query
@ nvme_xcoder_general_versions_query
Definition: ni_nvme.h:445
_ni_nvme_identity::ui8Vwc
uint8_t ui8Vwc
Definition: ni_nvme.h:133
nvme_admin_cmd_xcoder_write
@ nvme_admin_cmd_xcoder_write
Definition: ni_nvme.h:323
_ni_nvme_identity::ui8Elpe
uint8_t ui8Elpe
Definition: ni_nvme.h:113
nvme_admin_cmd_xcoder_download_buffer
@ nvme_admin_cmd_xcoder_download_buffer
Definition: ni_nvme.h:331
_ni_nvme_identity::ui8Lpa
uint8_t ui8Lpa
Definition: ni_nvme.h:112
nvme_admin_cmd_security_send
@ nvme_admin_cmd_security_send
Definition: ni_nvme.h:316
ni_nvme_result_t
uint32_t ni_nvme_result_t
Definition: ni_nvme.h:461
_ni_nvme_identity::hw1_codec_type
uint8_t hw1_codec_type
Definition: ni_nvme.h:183
nvme_query_xcoder_query_session
@ nvme_query_xcoder_query_session
Definition: ni_nvme.h:357
_nvme_read_xcoder_subtype
_nvme_read_xcoder_subtype
Definition: ni_nvme.h:345
nvme_admin_cmd_xcoder_recycle_buffer
@ nvme_admin_cmd_xcoder_recycle_buffer
Definition: ni_nvme.h:325
_ni_nvme_identity::hw2_video_profile
uint8_t hw2_video_profile
Definition: ni_nvme.h:201
_ni_nvme_identity::aui8Unvmcap
uint8_t aui8Unvmcap[16]
Definition: ni_nvme.h:123
_nvme_config_xcoder_config_session_subtype
_nvme_config_xcoder_config_session_subtype
Definition: ni_nvme.h:406
_ni_nvme_identity::ai8Sn
uint8_t ai8Sn[20]
Definition: ni_nvme.h:95
ni_nvme_admin_opcode_t
enum _ni_nvme_admin_opcode ni_nvme_admin_opcode_t
_nvme_query_xcoder_session_subtype
_nvme_query_xcoder_session_subtype
Definition: ni_nvme.h:362
nvme_config_xcoder_config_set_upload_load
@ nvme_config_xcoder_config_set_upload_load
Definition: ni_nvme.h:428
nvme_admin_cmd_xcoder_config
@ nvme_admin_cmd_xcoder_config
Definition: ni_nvme.h:324
_ni_nvme_identity::ui8Aerl
uint8_t ui8Aerl
Definition: ni_nvme.h:110
_ni_nvme_identity_xcoder_hw::hw_max_4k_fps
uint8_t hw_max_4k_fps
Definition: ni_nvme.h:76
_ni_nvme_identity::hw3_min_video_height
uint16_t hw3_min_video_height
Definition: ni_nvme.h:213
nvme_xcoder_general_subtype_t
enum _nvme_xcoder_general_subtype nvme_xcoder_general_subtype_t
nvme_config_xcoder_config_global
@ nvme_config_xcoder_config_global
Definition: ni_nvme.h:403
nvme_admin_cmd_xcoder_connect
@ nvme_admin_cmd_xcoder_connect
Definition: ni_nvme.h:321
_ni_nvme_identity_xcoder_hw::hw_video_profile
uint8_t hw_video_profile
Definition: ni_nvme.h:83
_ni_nvme_command::cdw3
uint32_t cdw3
Definition: ni_nvme.h:43
_ni_nvme_command::cdw2
uint32_t cdw2
Definition: ni_nvme.h:42
_ni_nvme_command::cdw13
uint32_t cdw13
Definition: ni_nvme.h:47
_ni_nvme_identity::ui8RAIDsupport
uint8_t ui8RAIDsupport
Definition: ni_nvme.h:151
_ni_nvme_identity::ui32Rpmbs
uint32_t ui32Rpmbs
Definition: ni_nvme.h:124
_ni_nvme_identity::hw2_max_video_height
uint16_t hw2_max_video_height
Definition: ni_nvme.h:198
_ni_nvme_identity::xcoder_devices
ni_nvme_identity_xcoder_hw_t xcoder_devices[NI_MAX_DEVICES_PER_HW_INSTANCE]
Definition: ni_nvme.h:232
nvme_admin_cmd_xcoder_query
@ nvme_admin_cmd_xcoder_query
Definition: ni_nvme.h:320
_ni_nvme_identity::ui8Avscc
uint8_t ui8Avscc
Definition: ni_nvme.h:115
nvme_config_xcoder_config_instance_subtype_t
enum _nvme_config_xcoder_config_instance_subtype nvme_config_xcoder_config_instance_subtype_t
nvme_admin_cmd_xcoder_general
@ nvme_admin_cmd_xcoder_general
Definition: ni_nvme.h:328
NI_MAX_DEVICE_NAME_LEN
#define NI_MAX_DEVICE_NAME_LEN
Definition: ni_defs.h:224
_ni_nvme_identity::ui16Cctemp
uint16_t ui16Cctemp
Definition: ni_nvme.h:118
_ni_nvme_identity::aui8Rsvd96
uint8_t aui8Rsvd96[160]
Definition: ni_nvme.h:107
nvme_xcoder_general_status_query
@ nvme_xcoder_general_status_query
Definition: ni_nvme.h:444
nvme_open_xcoder_subtype_t
enum _nvme_open_xcoder_subtype nvme_open_xcoder_subtype_t
_ni_nvme_identity::hw0_min_video_height
uint16_t hw0_min_video_height
Definition: ni_nvme.h:174
nvme_config_xcoder_instance_read_buf_size_busy_place_holder
@ nvme_config_xcoder_instance_read_buf_size_busy_place_holder
Definition: ni_nvme.h:437
_ni_nvme_identity::xcoder_num_h264_decoder_hw
uint8_t xcoder_num_h264_decoder_hw
Definition: ni_nvme.h:160
_ni_nvme_identity::ui8Rsvd531
uint8_t ui8Rsvd531
Definition: ni_nvme.h:137
_ni_nvme_identity::ui8Apsta
uint8_t ui8Apsta
Definition: ni_nvme.h:116
nvme_query_xcoder_session_get_stats
@ nvme_query_xcoder_session_get_stats
Definition: ni_nvme.h:364
ni_nvme_command_t
struct _ni_nvme_command ni_nvme_command_t
_ni_nvme_write_complete_dw0_t::available_space
uint32_t available_space
Definition: ni_nvme.h:454
_ni_nvme_id_power_state::ui16IdlePower
uint16_t ui16IdlePower
Definition: ni_nvme.h:63
ni_nvme_send_io_cmd
int32_t ni_nvme_send_io_cmd(ni_nvme_opcode_t opcode, ni_device_handle_t fd, ni_nvme_command_t *p_ni_nvme_cmd, uint32_t data_len, void *data, uint32_t *pResult)
Compose a nvme io command.
Definition: ni_nvme.c:371
nvme_query_xcoder_query_instance
@ nvme_query_xcoder_query_instance
Definition: ni_nvme.h:358
_ni_nvme_identity::aui8Rsvd534
uint8_t aui8Rsvd534[2]
Definition: ni_nvme.h:139
_ni_nvme_command::cdw15
uint32_t cdw15
Definition: ni_nvme.h:49
nvme_config_xcoder_config_session
@ nvme_config_xcoder_config_session
Definition: ni_nvme.h:401
nvme_query_xcoder_instance_read_perf_metrics
@ nvme_query_xcoder_instance_read_perf_metrics
Definition: ni_nvme.h:370
nvme_config_xcoder_config_frame_clone
@ nvme_config_xcoder_config_frame_clone
Definition: ni_nvme.h:415
nvme_config_xcoder_config_namespace_num
@ nvme_config_xcoder_config_namespace_num
Definition: ni_nvme.h:413
nvme_query_xcoder_general_subtype_t
enum _nvme_query_xcoder_general_subtype nvme_query_xcoder_general_subtype_t
nvme_config_xcoder_config_set_scaler_params
@ nvme_config_xcoder_config_set_scaler_params
Definition: ni_nvme.h:424
_ni_nvme_identity::fw_build_id
uint8_t fw_build_id[256]
Definition: ni_nvme.h:222
nvme_query_xcoder_instance_write_buf_size
@ nvme_query_xcoder_instance_write_buf_size
Definition: ni_nvme.h:380
nvme_config_xcoder_config_flush
@ nvme_config_xcoder_config_flush
Definition: ni_nvme.h:427
ni_nvme_identity_t
struct _ni_nvme_identity ni_nvme_identity_t
nvme_admin_cmd_get_log_page
@ nvme_admin_cmd_get_log_page
Definition: ni_nvme.h:303
_ni_nvme_identity::ui8NbFlashChan
uint8_t ui8NbFlashChan
Definition: ni_nvme.h:150
nvme_config_xcoder_config_set_sos
@ nvme_config_xcoder_config_set_sos
Definition: ni_nvme.h:420
nvme_query_xcoder_instance_read_output_buf_size
@ nvme_query_xcoder_instance_read_output_buf_size
Definition: ni_nvme.h:383
_ni_nvme_identity::xcoder_num_hw
uint8_t xcoder_num_hw
Definition: ni_nvme.h:159
_ni_nvme_identity::ui16Acwu
uint16_t ui16Acwu
Definition: ni_nvme.h:138
_ni_nvme_identity_xcoder_hw::hw_video_level
uint8_t hw_video_level
Definition: ni_nvme.h:84
_ni_nvme_identity::hw3_max_number_of_contexts
uint8_t hw3_max_number_of_contexts
Definition: ni_nvme.h:206
_ni_nvme_identity::ui8Fna
uint8_t ui8Fna
Definition: ni_nvme.h:132
nvme_query_xcoder_instance_read_buf_size_busy
@ nvme_query_xcoder_instance_read_buf_size_busy
Definition: ni_nvme.h:388
_ni_nvme_identity::ui16Oacs
uint16_t ui16Oacs
Definition: ni_nvme.h:108
_ni_nvme_id_power_state::ui8ReadTput
uint8_t ui8ReadTput
Definition: ni_nvme.h:59
nvme_config_xcoder_config_session_keep_alive
@ nvme_config_xcoder_config_session_keep_alive
Definition: ni_nvme.h:408
nvme_admin_cmd_xcoder_close
@ nvme_admin_cmd_xcoder_close
Definition: ni_nvme.h:319
_ni_nvme_id_power_state::ui16MaxPower
uint16_t ui16MaxPower
Definition: ni_nvme.h:54
_ni_nvme_identity::aui8Ieee
uint8_t aui8Ieee[3]
Definition: ni_nvme.h:99
nvme_admin_cmd_xcoder_init_framepool
@ nvme_admin_cmd_xcoder_init_framepool
Definition: ni_nvme.h:326
nvme_config_xcoder_config_set_enc_params
@ nvme_config_xcoder_config_set_enc_params
Definition: ni_nvme.h:422
_ni_nvme_identity_xcoder_hw::hw_codec_format
uint8_t hw_codec_format
Definition: ni_nvme.h:77
_ni_nvme_identity::ui8CurPcieLnkSpd
uint8_t ui8CurPcieLnkSpd
Definition: ni_nvme.h:146
nvme_config_xcoder_config_session_sw_version
@ nvme_config_xcoder_config_session_sw_version
Definition: ni_nvme.h:412
nvme_admin_cmd_delete_cq
@ nvme_admin_cmd_delete_cq
Definition: ni_nvme.h:304
_ni_nvme_id_power_state::ui32ExitLat
uint32_t ui32ExitLat
Definition: ni_nvme.h:58
nvme_query_xcoder_instance_acquire_buf
@ nvme_query_xcoder_instance_acquire_buf
Definition: ni_nvme.h:378
nvme_config_xcoder_config_set_eos
@ nvme_config_xcoder_config_set_eos
Definition: ni_nvme.h:421
nvme_config_xcoder_config_session_keep_alive_timeout
@ nvme_config_xcoder_config_session_keep_alive_timeout
Definition: ni_nvme.h:411
_ni_nvme_identity::hw2_min_video_width
uint16_t hw2_min_video_width
Definition: ni_nvme.h:199
_nvme_config_xcoder_subtype
_nvme_config_xcoder_subtype
Definition: ni_nvme.h:399
_ni_nvme_admin_opcode
_ni_nvme_admin_opcode
Definition: ni_nvme.h:299
_nvme_config_xcoder_config_instance_subtype
_nvme_config_xcoder_config_instance_subtype
Definition: ni_nvme.h:418
nvme_config_xcoder_config_ddr_priority
@ nvme_config_xcoder_config_ddr_priority
Definition: ni_nvme.h:414
nvme_config_xcoder_config_session_subtype_t
enum _nvme_config_xcoder_config_session_subtype nvme_config_xcoder_config_session_subtype_t
nvme_config_xcoder_config_alloc_frame
@ nvme_config_xcoder_config_alloc_frame
Definition: ni_nvme.h:435
nvme_write_xcoder_subtype_t
enum _nvme_write_xcoder_subtype nvme_write_xcoder_subtype_t
_ni_nvme_identity::aui8Rsvd316
uint8_t aui8Rsvd316[196]
Definition: ni_nvme.h:125
_ni_nvme_identity::hw2_max_video_width
uint16_t hw2_max_video_width
Definition: ni_nvme.h:197
nvme_admin_cmd_abort_cmd
@ nvme_admin_cmd_abort_cmd
Definition: ni_nvme.h:307
_ni_nvme_identity_xcoder_hw::hw_id
uint8_t hw_id
Definition: ni_nvme.h:74
_ni_nvme_identity::hw3_reserved
uint8_t hw3_reserved[9]
Definition: ni_nvme.h:216
_ni_nvme_identity::ui32Sgls
uint32_t ui32Sgls
Definition: ni_nvme.h:140
_ni_nvme_identity::hw2_codec_format
uint8_t hw2_codec_format
Definition: ni_nvme.h:195
_ni_nvme_identity::hw1_max_video_height
uint16_t hw1_max_video_height
Definition: ni_nvme.h:185
_ni_nvme_identity::hw2_video_level
uint8_t hw2_video_level
Definition: ni_nvme.h:202
_ni_nvme_identity::hw3_min_video_width
uint16_t hw3_min_video_width
Definition: ni_nvme.h:212
nvme_admin_cmd_async_event
@ nvme_admin_cmd_async_event
Definition: ni_nvme.h:310
_ni_nvme_identity_xcoder_hw
Definition: ni_nvme.h:72
_ni_nvme_identity::hw1_video_level
uint8_t hw1_video_level
Definition: ni_nvme.h:189
_ni_nvme_identity::ui8Cmic
uint8_t ui8Cmic
Definition: ni_nvme.h:100
_ni_nvme_identity::ui16Ssvid
uint16_t ui16Ssvid
Definition: ni_nvme.h:94
_ni_nvme_identity::hw1_min_video_height
uint16_t hw1_min_video_height
Definition: ni_nvme.h:187
nvme_admin_cmd_xcoder_identity
@ nvme_admin_cmd_xcoder_identity
Definition: ni_nvme.h:327
_ni_nvme_identity::aui32Tnvmcap
uint8_t aui32Tnvmcap[16]
Definition: ni_nvme.h:122
nvme_query_xcoder_instance_network_layer_size
@ nvme_query_xcoder_instance_network_layer_size
Definition: ni_nvme.h:382
nvme_config_xcoder_config_hvsplus
@ nvme_config_xcoder_config_hvsplus
Definition: ni_nvme.h:429
_ni_nvme_identity::ui8Rab
uint8_t ui8Rab
Definition: ni_nvme.h:98
_ni_nvme_identity::ui8Cqes
uint8_t ui8Cqes
Definition: ni_nvme.h:127
_ni_nvme_identity::xcoder_num_elements
uint8_t xcoder_num_elements
Definition: ni_nvme.h:229
_ni_nvme_write_complete_dw0_t
Definition: ni_nvme.h:451
nvme_config_xcoder_config_update_enc_params
@ nvme_config_xcoder_config_update_enc_params
Definition: ni_nvme.h:430
nvme_config_xcoder_config_set_dec_params
@ nvme_config_xcoder_config_set_dec_params
Definition: ni_nvme.h:423
_ni_nvme_identity::ui16Fuses
uint16_t ui16Fuses
Definition: ni_nvme.h:131
_ni_nvme_identity::ui32Nn
uint32_t ui32Nn
Definition: ni_nvme.h:129
_ni_nvme_id_power_state::ui8ActiveWorkScale
uint8_t ui8ActiveWorkScale
Definition: ni_nvme.h:67
_ni_nvme_identity::ui16Awun
uint16_t ui16Awun
Definition: ni_nvme.h:134
nvme_query_xcoder_instance_network_layer_size_v2
@ nvme_query_xcoder_instance_network_layer_size_v2
Definition: ni_nvme.h:374
_ni_nvme_identity::hw3_max_1080p_fps
uint8_t hw3_max_1080p_fps
Definition: ni_nvme.h:207
_ni_nvme_identity::hw0_reserved
uint8_t hw0_reserved[9]
Definition: ni_nvme.h:177
_ni_nvme_identity::hw3_max_video_width
uint16_t hw3_max_video_width
Definition: ni_nvme.h:210
_nvme_open_xcoder_subtype
_nvme_open_xcoder_subtype
Definition: ni_nvme.h:334
_ni_nvme_identity::ui8Rsvd514
uint8_t ui8Rsvd514[2]
Definition: ni_nvme.h:128
ni_nvme_send_write_cmd
int32_t ni_nvme_send_write_cmd(ni_device_handle_t handle, ni_event_handle_t event_handle, void *p_data, uint32_t data_len, uint32_t lba)
Compose a io write command.
Definition: ni_nvme.c:634
_ni_nvme_identity::hw2_codec_type
uint8_t hw2_codec_type
Definition: ni_nvme.h:196
_ni_nvme_id_power_state::ui8Rsvd2
uint8_t ui8Rsvd2
Definition: ni_nvme.h:55
_ni_nvme_identity::ai8Fr
uint8_t ai8Fr[8]
Definition: ni_nvme.h:97
_ni_nvme_id_power_state::ui8ReadLat
uint8_t ui8ReadLat
Definition: ni_nvme.h:60
_ni_nvme_identity::hw0_codec_type
uint8_t hw0_codec_type
Definition: ni_nvme.h:170
nvme_query_xcoder_instance_scl_place_holder
@ nvme_query_xcoder_instance_scl_place_holder
Definition: ni_nvme.h:387
_ni_nvme_identity::fw_branch_name
uint8_t fw_branch_name[256]
Definition: ni_nvme.h:218
_ni_nvme_identity::fw_commit_time
uint8_t fw_commit_time[26]
Definition: ni_nvme.h:219
_ni_nvme_identity::asPsd
ni_nvme_id_power_state_t asPsd[32]
Definition: ni_nvme.h:142
nvme_query_xcoder_general_get_status
@ nvme_query_xcoder_general_get_status
Definition: ni_nvme.h:394
_ni_nvme_identity::hw2_max_1080p_fps
uint8_t hw2_max_1080p_fps
Definition: ni_nvme.h:194
nvme_query_xcoder_instance_read_ai_hw_output
@ nvme_query_xcoder_instance_read_ai_hw_output
Definition: ni_nvme.h:369
_ni_nvme_identity::ui8Nvscc
uint8_t ui8Nvscc
Definition: ni_nvme.h:136
nvme_query_xcoder_instance_get_end_of_output
@ nvme_query_xcoder_instance_get_end_of_output
Definition: ni_nvme.h:375
nvme_query_xcoder_general_get_detail_info
@ nvme_query_xcoder_general_get_detail_info
Definition: ni_nvme.h:395
_ni_nvme_id_power_state::ui32EntryLat
uint32_t ui32EntryLat
Definition: ni_nvme.h:57
_ni_nvme_identity::ui16Oncs
uint16_t ui16Oncs
Definition: ni_nvme.h:130